Results 41 to 50 of about 11,517 (220)

Quantum transport through a constriction in nanosheet gate-all-around transistors

Communications Engineering
In nanoscale transistors, quantum mechanical effects such as tunneling and quantization significantly influence device characteristics. However, large-scale quantum transport simulation remains a challenging field, making it difficult to account for ...
Kyoung Yeon Kim, Hong-Hyun Park, Seonghoon Jin, Uihui Kwon, Woosung Choi, Dae Sin Kim   +5 more
doaj   +1 more source

TCAD Driven Light-Trapping Enhancement in Silicon Photovoltaics through Engineered Nanohole Geometries

Журнал нано- та електронної фізики
Nanohole (NH) patterning in silicon has been widely explored as an effective light-trapping strategy for photovoltaic devices; however, the extent to which optical enhancement translates into electrical performance improvement remains strongly limited by
Monika Gogoi, T.D. Das
doaj   +1 more source

Engineering Slow‐Carrier Interfacial Recombination Enables Tailored Spectral Response

Advanced Science, EarlyView.
This work demonstrates that weak‐drift slow carriers are preferentially captured at generic semiconductor surfaces/interfaces and recombine. This process is manipulated to achieve tailored spectral response. A tens of µm‐wide depletion region is created to observe surface collection rates for photocarriers generated at different positions.
Yibo Zhang, Haozhe Wang, Zeke Liu, Yun Zhong, Zheng‐Hong Lu, Nazir P. Kherani   +5 more
wiley   +1 more source

Impact of Hole Density on Sub-10 nm SOI Trigate MOSFET Using Charge Plasma Technique with Circuit-Level Analysis

Журнал нано- та електронної фізики
In this work, the charge plasma (CP) technique is employed to induce carriers in the undoped channel region of a Silicon-on-Insulator (SOI) trigate MOSFET, eliminating the need for conventional doping and reducing variability at nanoscale dimensions.
S.A. Kumar, J. Prabhu G, V. Sandeep, J. Soundararajan   +3 more
doaj   +1 more source

A Compendium of Logic Gates Based on Reconfigurable Three‐Independent‐Gate Transistors Realized in FDSOI Hardware

Advanced Electronic Materials, EarlyView.
This work electrically characterizes sixteen logic gates built from three‐independent‐gate reconfigurable transistors fabricated on full‐scale 300 mm wafers using the industrial 22 nm fully depleted FDSOI process of GlobalFoundries. Static and time‐resolved measurements confirm correct operation, including a 1‐bit adder and reconfigurable AOI/OAI ...
Juan P. Martinez, Yuxuan He, Giulio Galderisi, Violetta Sessi, Niladri Bhattacharjee, Peter Baars, Kerstin Poenisch, Annekathrin Zeun, Konstantin Li, Fernando Koch, Binit Syamal, Thomas Mikolajick, Jens Trommer   +12 more
wiley   +1 more source

Large-signal device simulation in time- and frequency-domain: a comparison [PDF]

, 2008
The aim of this paper is to compare the most common time- and frequency-domain numerical techniques for the determination of the steady-state solution in the physics-based simulation of a semiconductor device driven by a time-periodic generator.
Bonani, Fabrizio, Francesco Bertazzi, Giovanni Ghione, Ghione, Giovanni, Donati Guerrieri, Simona, Simona Donati Guerrieri, Bertazzi, Francesco, Fabrizio Bonani   +7 more
core   +1 more source

Triple combination antiviral drug (TCAD) composed of amantadine, oseltamivir, and ribavirin impedes the selection of drug-resistant influenza A virus.

PLoS ONE, 2011
Widespread resistance among circulating influenza A strains to at least one of the anti-influenza drugs is a major public health concern. A triple combination antiviral drug (TCAD) regimen comprised of amantadine, oseltamivir, and ribavirin has been ...
Justin D Hoopes, Elizabeth M Driebe, Erin Kelley, David M Engelthaler, Paul S Keim, Alan S Perelson, Libin Rong, Gregory T Went, Jack T Nguyen   +8 more
doaj   +1 more source

TCAD simulation of AC-LGADs

, 2023
Low Gain Avalanche Detectors (LGADs) are thin silicon detectors with moderate internal signal amplification and time resolution as good as 17 ps for minimum ionizing particles. However, the current major limiting factor in granularity is due to protection structures preventing breakdown caused by high electric fields at the edge of the segmented ...
Nizam, M., Shin, K. W., Mazza, S. M., Ott, J., Seiden, A., Schumm, B., Zhao, Y.   +6 more
openaire   +2 more sources

Efficient In‐Hardware Matrix–Vector Multiplication and Addition Exploiting Bilinearity of Schottky Barrier Transistors Processed on Industrial FDSOI

Advanced Electronic Materials, EarlyView.
ABSTRACT Machine learning and Artificial Intelligence (AI) tasks have stretched traditional hardware to its limits. In‐hardware computation is a novel approach that aims to run complex operations, such as matrix–vector multiplication, directly at the device level for increased efficiency.
Juan P. Martinez, Niladri Bhattacharjee, Yuxuan He, Giulio Galderisi, Brojogopal Sapui, Sara Mannaa, Ian O'Connor, Violetta Sessi, Peter Javorka, Thomas Mikolajick, Jens Trommer   +10 more
wiley   +1 more source

Study of DX centers in AlGaAs/InGaAs/GaAs pHEMT

Известия высших учебных заведений России: Радиоэлектроника
Introduction. A major challenge in AlGaAs-based heterostructure devices is the presence of DX centers in heavily doped n-type layers. These deep donor traps degrade the performance of pseudomorphic high electron mobility transistors (pHEMTs).
A. V. Sapozhnikov, R. S. Kryukov, A. I. Baranov, A. L. Dudin, V. V. Perepelovskiy   +4 more
doaj   +1 more source