Enabling scalable ferroelectric-based future generation vertical NAND flash with bonding-friendly architecture: strategies for erase and disturb optimization. [PDF]
Song I, Kim J, Lee S, Myeong I.
europepmc +1 more source
The Modeling of a Single-Electron Bipolar Avalanche Transistor in 150 nm CMOS. [PDF]
Boughedda A +6 more
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Modeling the effect of position-dependent random dopant fluctuations on the process variability of submicron channel MOSFETs through charge-based compact models: a Green's function approach [PDF]
Bonani, Fabrizio +3 more
core
Polarization Engineered Design for Normally-Off, Higher Drain Current and Higher Breakdown Voltage Gan-Based MOS-HEMT. [PDF]
Omar A, Loan SA.
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Design and Optimization of AlGaN/AlN/GaN L‑SBD for Radiofrequency Applications. [PDF]
Dudekula S +5 more
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Demonstration of accurate ID-VG characteristics modeling in SiC mosfets using separated artificial neural networks with small training dataset. [PDF]
Chankla M +7 more
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Traumatic carotid artery dissection and occlusion caused by repetitive mechanical stress to the neck while carrying a mikoshi (portable shrine): illustrative case. [PDF]
Sato A +8 more
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Total Ionizing Dose Effect Simulation Modeling and Analysis for a DCAP Power Chip. [PDF]
Liao X +10 more
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Incorporation of Temperature Impact on Hot-Carrier Degradation into Compact Physics Model. [PDF]
Tyaginov S +9 more
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