A Universal Implementation Approach for Multivalued Logic Gates Based on Negative Transconductance in Series-Connected Two-Dimensional Transistors. [PDF]
Zhao G +6 more
europepmc +1 more source
Design Error Diagnosis in Logic Circuits using Ternary Test Sets
Debugging of logic circuits necessitates not only the error detection, but also the reasoning about its cause and location. In this report diagnostic routines are presented for this purpose.
Ayman Wahba, David Déharbe
core
High-Performance Ambipolar Organic Electrochemical Transistors Based on Diketopyrrolopyrrole-Dialkoxybithiazole Conjugated Polymers for Single-component Inverters. [PDF]
Li J +14 more
europepmc +1 more source
Design and optimization of a quaternary booth multiplier in quaternary logic using carbon nanotube transistors. [PDF]
Toosanloo SA, Javidan J.
europepmc +1 more source
Targeting the immunological synapse in multiple myeloma. [PDF]
Sumei L, Bahmani F.
europepmc +1 more source
Spontaneous emergence of Dzyaloshinskii-Moriya interaction via field-cooling-induced interface engineering in 2D ferromagnetic ternary tellurides. [PDF]
Xia S +14 more
europepmc +1 more source
An area and power efficient ternary serial adder using phase composite ZnO stack channel FETs. [PDF]
Kim K +6 more
europepmc +1 more source
Research progress and future perspectives in proteolysis-targeting chimeras. [PDF]
Wu N, Xu Z, Dai S, Wang Q.
europepmc +1 more source
Intracellularly coupled oscillators for synthetic biology. [PDF]
Holló G, Park JH, Evard RA, Schaerli Y.
europepmc +2 more sources
Power optimized quaternary logic circuits based on CNTFETs. [PDF]
Rupani A, Bansal D, Sharma K.
europepmc +1 more source

