Results 221 to 230 of about 2,464 (259)

Experimental system of ternary logic optical computer with reconfigurability

SPIE Proceedings, 2009
An experimental system of a ternary logic optical computer, including its working principle, architecture and main components, is proposed. The main object of this paper is to give readers a holistic understanding of the ternary optical computer. This experimental system, which fully exploits the parallelism of optics, can have huge data bus width ...
Zhang-Yi Shen, Yi Jin, Jun-Jie Peng
openaire   +1 more source

On constructing intellectual systems in ternary logic

Programming and Computer Software, 2014
The paper shows that it is possible to develop an intelligent system on a production knowledge model using three-valued logic, which operates with the states "truth, false, possible". A method is proposed for constructing intelligent systems that are free from contradictions and are capable of not only extracting facts but also explaining what facts ...
openaire   +1 more source

A redundant binary adder using a symmetric ternary logic system

International Journal of Electronics, 1993
A construction method is described for a fast parallel adder by using a redundant binary code (RBC). The RBC used has a fixed radix 2 and a digit set {−1,0,1}. The fast parallel adder is composed of ternary-valued CMOS gate networks, which are used in the symmetric ternary logic system, and its construction can be optimized with them.
SHINSAKU HIGASHI, TAKEO MIYATA, KOUSUKE TSUKAMOTO, TAKEYUKI KOBAYASHI   +3 more
openaire   +1 more source

Ternary Logic Signals Transmission Based on a Unified Chaotic System

2006 International Conference on Communications, Circuits and Systems, 2006
In this paper, we present a method for transmitting ternary logic digital signals based on chaos masking, using a new unified chaotic system. The unified chaotic system is in the form of a general Lorenz system, which can generate the dynamics of Lorenz system, Chen system or Lu system, controlled by a simple analog switch.
Wenbo Liu, Wallace S. Tang, Guanrong Chen   +2 more
openaire   +1 more source

Simulation of Ternary CMOS Schemes for Many-Valued Logic Systems

2019 IEEE 31st International Conference on Microelectronics (MIEL), 2019
Of interest is the possibility of implementing many-valued logic systems using traditional CMOS technologies. We considered an example of the implementation of three-valued logic elements based on symmetric 3vL logic using the values {-,0,+}, {-1.0, + 1}, {1,0,1}, {1,0,1} etc.
A. A. Krasnyuk, A. G. Prozorova
openaire   +1 more source

A P-ternary threshold element network-an application of ternary logic to a neural system treating ambiguity

Proceedings. The Nineteenth International Symposium on Multiple-Valued Logic, 2003
An application of ternary logic to a neural system treating ambiguity is considered. A method to find a threshold function (a learning method) is proposed. Ternary logic functions with no information loss concerning ambiguity, called P-functions, are introduced.
Y. Yamamoto, M. Mukaidono
openaire   +1 more source

Comparative Analysis of Crosstalk Effects in Dielectric Inserted Horizontal andVertical Multi-layer GNR Interconnects for Ternary Logic System

ECS Journal of Solid State Science and Technology, 2022
In this work, the performance of copper (Cu), dielectric inserted horizontal graphene nanoribbon (Di-HGNR) interconnect and dielectric inserted vertical graphene nanoribbon (Di-VGNR) interconnects are investigated using active shielding and passive shielding techniques.
Gurijala Deepthi, Madhavi Tatineni
openaire   +1 more source

Designing Unconventional Molecular Ternary INHIBIT Logic Gate and Crafting Multifunctional Molecular Logic Systems

The Journal of Physical Chemistry B
The paper describes an improved method for building flexible interswitchable logic gates such as rare-type molecular ternary INHIBIT and combinational logic circuits using a specially designed pyridine-end oligo-p-phenylenevinylene compound featuring alkyl substituents (-C16H33) in a THF medium.
Monaj Karar, Harshal V. Barkale, Sahil D. Vasishtha, Nilanjan Dey   +3 more
openaire   +2 more sources

Design of one-vector testable binary systems based on ternary logic

Proceedings of 26th IEEE International Symposium on Multiple-Valued Logic (ISMVL'96), 2002
A new concept, one-vector testability, is defined. Design method to achieve one-vector testability of binary systems based on ternary logic is proposed. Some techniques for designing testable binary systems based on ternary circuits are re-examined by using the proposed design method.
openaire   +1 more source

A general method for CMOS realization of any logic function in ternary computer system

2007 10th international conference on computer and information technology, 2007
This paper develops a general method for realization for any logic function using CMOS. By this new method, any ternary logic function can be realized by using only three unary and two binary functions. This method is more efficient than previously published CMOS realization.
openaire   +1 more source