Results 111 to 120 of about 118,706,258 (232)
An Asynchronous Pipelined Time-to-Digital Converter Using Time-Domain Subtraction
, 2018 This paper presents the design of a low-power asynchronous pipelined time-to-digital converter (AP-TDC) to be employed in a time-domain signal processing system.
Omer Can Akgun, Akgün, O.C. (author)
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Implementation of high-resolution time-to-digital converter in 8-bit microcontrollers
, 2012 This paper will demonstrate how a time-to-digital converter (TDC) with sub-nanosecond resolution can be implemented into an 8-bit microcontroller using so called “direct” methods.
Bengtsson, Lars,, Lars E. Bengtsson
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IEEE AccessThis paper proposes a low-power design method and a low-noise phase offset calibration technique for a gated ring-oscillator time-to-digital converter (GRO-TDC), which normally consumes a large percentage of most all-digital phase-locked loop (ADPLL ...
Kyoung-Ub Cho +9 more
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A multichannel time-to-digital converter ASIC with better than 3 ps RMS time resolution
, 2014 The development of a new multichannel, fine-time resolution time-to-digital converter (TDC) ASIC is currently under development at CERN. A prototype TDC has been designed, fabricated and successfully verified with demonstrated time resolutions of better ...
Perktold, L, Christiansen, J
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A Configurable Resolution Time-to-Digital Converter with Low PVT Sensitivity for LiDAR Applications
This paper presents an all-digital and configurable resolution time-to-digital converter (TDC) with low process–voltage–temperature (PVT) sensitivity for light detection and ranging (LiDAR) applications.
Cheng-I Cheng +4 more
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A Multihit Time-to-Digital Converter Architecture on FPGA
, 2009 We present a multihit time-to-digital converter (TDC) architecture implemented in a field-programmable gate array (FPGA) with minimized timing overhead. The TDC circuit provides two-level fine-time interpolation.
Khouas, Abdelhakim +2 more
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Applied SciencesLong-range single-photon LiDAR requires both a wide time-of-flight (ToF) dynamic range and fine temporal resolution, while the nonuniform fine-time bins of FPGA carry-chain tapped delay lines (TDLs) can introduce systematic errors into time ...
Tong Xue +6 more
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A Background Jitter Calibration for ADCs Using TDC Phase Information From ADPLL
IEEE AccessThe phase noise, commonly known as jitter, in Phase-Locked Loops (PLLs) is conventionally perceived as a stochastic process, necessitating a degree of tolerance in downstream circuits such as Analog-to-Digital Converters (ADCs). This paper addresses this
Haoyang Shen +4 more
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A magnetic field to digital converter using PWM and TDC techniques
, 2013 [[abstract]]A high resolution magnetic-?eld-to-digital converter (MDC) is presented. It is composed of a magnetic-?eld-to-pulse width converter (MPC), a cyclic pulse-shrinking time-to-digital converter (TDC) and a polarity detector.
Chien-Hung Kuo;Shr-Lung Chen;Shen-Iuan Liu
core
A 2-D GRO Vernier Time-to-Digital Converter with Large Input Range and Small Latency
, 2013 The proposed time-to-digital converter (TDC) arranges two Vernier gated-ring-oscillator (GRO) branches in a 2-dimension (2-D) fashion. All delay differences between X-axis phases and Y-axis phases (based on 2-D definition) can be used, rather than only ...
Liscidini, Antonio +8 more
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