Results 121 to 130 of about 702 (169)
Design of a Mobile and Electromagnetic Emissions-Compliant Brain Positron Emission Tomography (PET) Scanner. [PDF]
Fuentes C +10 more
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Quantum entanglement network enabled by a state-multiplexing quantum light source. [PDF]
Fan YR +11 more
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High-rate quantum key distribution with compact state preparation and detection. [PDF]
Fan-Yuan GJ +12 more
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Triggerbare Signalgeneratoren f\"ur einen Pipeline TDC ( Time Digital Converter)
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Design and implementation of a high resolution, multi-hit time-to-digital converter (TDC) on FPGA
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2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS), 2017
Based on the parallel DTCs as delay cells, a 4-bit TDC with adjustable 0.7ps∼1.4ps resolution and 11ps∼22ps dynamic range is proposed in this paper. In this design, an extremely high resolution DTC is presented, achieving 15.6fs delay per LSB. By utilizing 16 DTCs which are adjusted to have the same time interval among two neighboring DTCs, a highly ...
Tingbing Ouyang +4 more
exaly +2 more sources
Based on the parallel DTCs as delay cells, a 4-bit TDC with adjustable 0.7ps∼1.4ps resolution and 11ps∼22ps dynamic range is proposed in this paper. In this design, an extremely high resolution DTC is presented, achieving 15.6fs delay per LSB. By utilizing 16 DTCs which are adjusted to have the same time interval among two neighboring DTCs, a highly ...
Tingbing Ouyang +4 more
exaly +2 more sources
NORCHIP 2010, 2010
This paper describes a digital-to-time converter (DTC) architecture that can be used as a fine interpolator in a time-to-digital converter (TDC) or as an adjustable delay in clock deskewing, for example. The new architecture of the DTC achieves adjustable sub-ps-level resolution with high linearity in ns-level dynamic range.
Juha Kostamovaara, Antti Mäntyniemi
exaly +2 more sources
This paper describes a digital-to-time converter (DTC) architecture that can be used as a fine interpolator in a time-to-digital converter (TDC) or as an adjustable delay in clock deskewing, for example. The new architecture of the DTC achieves adjustable sub-ps-level resolution with high linearity in ns-level dynamic range.
Juha Kostamovaara, Antti Mäntyniemi
exaly +2 more sources
High resolution distributed time-to-digital converter (TDC) in a White Rabbit network
Nuclear Instruments and Methods in Physics Research, Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, 2014Abstract The Large High Altitude Air Shower Observatory (LHAASO) project consists of a complex detector array with over 6000 detector nodes spreading over 1.2 km2 areas. The arrival times of shower particles are captured by time-to-digital converters (TDCs) in the detectors' frontend electronics, the arrival direction of the high energy cosmic ray ...
Qiang Du, Jianmin Li, Hongming Li
exaly +2 more sources
2011 IEEE International Instrumentation and Measurement Technology Conference, 2011
This paper describes a cyclic time domain successive approximation (CTDSA) architecture that can be used as an interpolator in a time-to-digital converter (TDC). The new architecture of the CTDSA achieves adjustable sub-ps-level resolution with high linearity in ns-level dynamic range.
Juha Kostamovaara, Antti Mäntyniemi
exaly +4 more sources
This paper describes a cyclic time domain successive approximation (CTDSA) architecture that can be used as an interpolator in a time-to-digital converter (TDC). The new architecture of the CTDSA achieves adjustable sub-ps-level resolution with high linearity in ns-level dynamic range.
Juha Kostamovaara, Antti Mäntyniemi
exaly +4 more sources
2012 IEEE International Instrumentation and Measurement Technology Conference Proceedings, 2012
This paper describes a digital-to-time converter (DTC) architecture that can be used as interpolator in a time-to-digital converter (TDC). The new architecture of the DTC achieves adjustable sub-ps-level resolution with high linearity in ns-level dynamic range.
Juha Kostamovaara, Antti Mäntyniemi
exaly +2 more sources
This paper describes a digital-to-time converter (DTC) architecture that can be used as interpolator in a time-to-digital converter (TDC). The new architecture of the DTC achieves adjustable sub-ps-level resolution with high linearity in ns-level dynamic range.
Juha Kostamovaara, Antti Mäntyniemi
exaly +2 more sources

