62.5 ps LSB resolution multiphase clock Time to Digital Converter (TDC) implemented on FPGA
A 13-bit Time to Digital Converter is implemented using multiphase clock technique. Xilinx’s Virtex 5 FPGA platform is used to realize the TDC architecture.
Mahantesh Mattada, Hansraj Guhilot
doaj +4 more sources
An Observer–Data-Path Decoupled Time-Domain ADC with Three-Stage Digital Background Calibration in 28 nm CMOS [PDF]
This paper presents an observer–data-path decoupled time-domain ADC with three-stage digital background calibration, designed and comprehensively verified through post-layout simulations in 28 nm CMOS for highly integrated micro-systems. In scaled nodes,
Chuan Qin +4 more
doaj +2 more sources
Arrayable TDC with Voltage-Controlled Ring Oscillator for dToF Image Sensors [PDF]
As the resolution and conversion speed of time-to-digital conversion (TDC) chips continue to improve, the bit error rate also increases, leading to a decrease in the linearity of TDC and seriously affecting measurement accuracy.
Liying Chen +2 more
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Application and Comparison of FPGA-Based Carry Chain TDC and DDMTD Schemes in High-Precision Time Synchronization [PDF]
High-precision phase difference measurement based on field-programmable gate arrays (FPGA) has important application requirements in fields such as high-stability time-frequency transmission, signal synchronization, and precision testing.
Yuzhen Huang +4 more
doaj +2 more sources
A Scalable Sub-Picosecond TDC Based on Analog Sampling of Dual-Phase Signals from a Free-Running Oscillator [PDF]
This work presents a novel time-to-digital converter based on the analog sampling of dual-phase periodic signals generated from a free-running oscillator.
Roberto Cardella +9 more
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A CMOS Integrator-Based Clock-Free Time-to-Digital Converter for Home-Monitoring LiDAR Sensors
This paper presents a nine-bit integrator-based time-to-digital converter (I-TDC) realized in a 180 nm CMOS technology for the applications of indoor home-monitoring light detection and ranging (LiDAR) sensors.
Ying He, Sung Min Park
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Dickson-Charge-Pump-Based Voltage-to-Time Conversion for Time-Based ADCs in 28-nm CMOS
This article demonstrates a digitally friendly time-based analog-to-digital converter (ADC) exploiting Dickson charge-pump (CP) as part of a voltage-to-time conversion (VTC) implemented in 28-nm CMOS. In the proposed technique, the Dickson CP generates a
Ali Esmailiyan +4 more
doaj +1 more source
Research of a carry chain TDC and its tap method
A time to digital converter(TDC) is implemented using carry chains in Xilinx Kinex-7 FPGA. FPGA-TDC is calibrated bin-by-bin through the code density calibration method.
Li Haitao +4 more
doaj +1 more source
A Resolution Control Loop for TDC-Based Phase Detectors in ADPLLs
This paper proposes a resolution control loop that runs in background to control the time resolution of a mid-rise Time to Digital Converter (TDC) used as a phase detector in All-Digital Phase Locked Loops (ADPLLs).
Abdelrahman Habib +2 more
doaj +1 more source
A Fast-Lock All-Digital Clock Generator for Energy Efficient Chiplet-Based Systems
An all-digital clock frequency multiplier that achieves excellent locking time for an energy-efficient chiplet-based system-on-chip (SoC) design is presented.
Junghoon Jin, Seungjun Kim, Jongsun Kim
doaj +1 more source

