Results 21 to 30 of about 772 (186)
Dickson-Charge-Pump-Based Voltage-to-Time Conversion for Time-Based ADCs in 28-nm CMOS
IEEE Open Journal of Circuits and Systems, 2021 This article demonstrates a digitally friendly time-based analog-to-digital converter (ADC) exploiting Dickson charge-pump (CP) as part of a voltage-to-time conversion (VTC) implemented in 28-nm CMOS. In the proposed technique, the Dickson CP generates a
Ali Esmailiyan +4 more
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Research of a carry chain TDC and its tap method
Dianzi Jishu Yingyong, 2022 A time to digital converter(TDC) is implemented using carry chains in Xilinx Kinex-7 FPGA. FPGA-TDC is calibrated bin-by-bin through the code density calibration method.
Li Haitao +4 more
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A Resolution Control Loop for TDC-Based Phase Detectors in ADPLLs
IEEE Access, 2023 This paper proposes a resolution control loop that runs in background to control the time resolution of a mid-rise Time to Digital Converter (TDC) used as a phase detector in All-Digital Phase Locked Loops (ADPLLs).
Abdelrahman Habib +2 more
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A Fast-Lock All-Digital Clock Generator for Energy Efficient Chiplet-Based Systems
IEEE Access, 2022 An all-digital clock frequency multiplier that achieves excellent locking time for an energy-efficient chiplet-based system-on-chip (SoC) design is presented.
Junghoon Jin, Seungjun Kim, Jongsun Kim
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A Low-Resources TDC for Multi-Channel Direct ToF Readout Based on a 28-nm FPGA
Sensors, 2021 In this paper, we present a proposed field programmable gate array (FPGA)-based time-to-digital converter (TDC) architecture to achieve high performance with low usage of resources.
Mojtaba Parsakordasiabi +3 more
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Information Processing in Agriculture, 2014 Time to digital converter (TDC) is a key block for time-gated single photon avalanche diode (SPAD) arrays for Raman spectroscopy that applicable in the agricultural products and food analysis. In this paper a new dual slope time to digital converter that
Mahdi Rezvanyvardom +2 more
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IEEE Transactions on Quantum Engineering, 2022 An almost all-digital time-to-digital converter (TDC) possessing subpicosecond resolutions, scalable dynamic ranges, high linearity, high noise immunity, and moderate conversion rates can be achieved by a random sampling-and-averaging (RSA) approach with
Tony Wu, Tzu-Chien Hsueh
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Applied Sciences, 2018 This paper presents a time-to-digital converter (TDC) based on a field programmable gate array (FPGA) with a tapped delay line (TDL) architecture. This converter employs dual delay lines (DDLs) to enable real-time calibrations, and the proposed DDL-TDC ...
Yuan-Ho Chen
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Sensors, 2021 A three-dimensional (3D) image sensor based on Single-Photon Avalanche Diode (SPAD) requires a time-to-digital converter (TDC) with a wide dynamic range and fine resolution for precise depth calculation. In this paper, we propose a novel high-performance
Zunkai Huang +6 more
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An 8-bit TDC implemented with two nested Johnson counters
Tecnología en Marcha, 2023 This work presents a Time-to-Digital Converter implemented using two nested Johnson counters and suitable for time-lapse measurement applications. The proposed structure is composed of two 4-bit nested counters, two digital-logic control networks, two ...
Jonathan Santiago-Fernandez +3 more
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