Results 11 to 20 of about 1,742 (210)
62.5 ps LSB resolution multiphase clock Time to Digital Converter (TDC) implemented on FPGA
Journal of King Saud University: Engineering Sciences, 2022 A 13-bit Time to Digital Converter is implemented using multiphase clock technique. Xilinx’s Virtex 5 FPGA platform is used to realize the TDC architecture.
Mahantesh Mattada, Hansraj Guhilot
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A CMOS Integrator-Based Clock-Free Time-to-Digital Converter for Home-Monitoring LiDAR Sensors
Sensors, 2022 This paper presents a nine-bit integrator-based time-to-digital converter (I-TDC) realized in a 180 nm CMOS technology for the applications of indoor home-monitoring light detection and ranging (LiDAR) sensors.
Ying He, Sung Min Park
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A Coarse-Fine Time-to-Digital Converter
ITM Web of Conferences, 2017 A design of time-to-digital converter (TDC) using a coarse-fine conversion scheme is presented. The coarse stage was accomplished by a delay line, and used a loop counter at the end of the delay line to achieve wide dynamic range. The fine stage utilized
Chen Ya-Qian, Meng Li-Ya, Lin Xiao-Gang
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Firmware-only implementation of time-to-digital converter (TDC) in field-programmable gate array (FPGA) [PDF]
2003 IEEE Nuclear Science Symposium. Conference Record (IEEE Cat. No.03CH37515), 2003 A Time-to-Digital Converter (TDC) implemented in general purpose field-programmable gate array, (FPGA) for the Fermilab CKM experiment will be presented. The TDC uses a delay chain and register array structure to produce lower bits in addition to higher bits from a clock counter.
Wu, Jinyuan, Shi, Zonghan, Wang, Irena Y
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A Novel Cyclic Time to Digital Converter Based on Triple-Slope Interpolation and Time Amplification [PDF]
Radioengineering, 2015 This paper investigates a novel cyclic time-to-digital converter (TDC) which employs triple-slope analog interpolation and time amplification techniques for digitizing the time interval between the rising edges of two input signals(Start and Stop).
M. Rezvanyvardom, E. Farshidi
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Arrayable TDC with Voltage-Controlled Ring Oscillator for dToF Image Sensors [PDF]
SensorsAs the resolution and conversion speed of time-to-digital conversion (TDC) chips continue to improve, the bit error rate also increases, leading to a decrease in the linearity of TDC and seriously affecting measurement accuracy.
Liying Chen +2 more
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Application and Comparison of FPGA-Based Carry Chain TDC and DDMTD Schemes in High-Precision Time Synchronization [PDF]
SensorsHigh-precision phase difference measurement based on field-programmable gate arrays (FPGA) has important application requirements in fields such as high-stability time-frequency transmission, signal synchronization, and precision testing.
Yuzhen Huang +4 more
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Sensors, 2020 This paper presents a reconfigurable time-to-digital converter (TDC) used to quantize the phase of the impedance in electrical impedance spectroscopy (EIS).
Sounghun Shin +7 more
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IEEE Journal of Solid-State Circuits, 2009 This paper describes a time-to-digital converter (TDC) with ~1.2 ps resolution and ~327 mus dynamic range suitable for laser range-finding application for example. The resolution of ~1.2 ps is achieved with interpolation based on a cyclic time domain successive approximation (CTDSA) method that resolves the time difference between two non-repetitive ...
Antti Mäntyniemi +2 more
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Information Processing in Agriculture, 2014 Time to digital converter (TDC) is a key block for time-gated single photon avalanche diode (SPAD) arrays for Raman spectroscopy that applicable in the agricultural products and food analysis. In this paper a new dual slope time to digital converter that
Mahdi Rezvanyvardom +2 more
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