Results 1 to 10 of about 1,191 (163)
62.5 ps LSB resolution multiphase clock Time to Digital Converter (TDC) implemented on FPGA
Journal of King Saud University: Engineering Sciences, 2022 A 13-bit Time to Digital Converter is implemented using multiphase clock technique. Xilinx’s Virtex 5 FPGA platform is used to realize the TDC architecture.
Mahantesh Mattada, Hansraj Guhilot
doaj +5 more sources
A CMOS Integrator-Based Clock-Free Time-to-Digital Converter for Home-Monitoring LiDAR Sensors
Sensors, 2022 This paper presents a nine-bit integrator-based time-to-digital converter (I-TDC) realized in a 180 nm CMOS technology for the applications of indoor home-monitoring light detection and ranging (LiDAR) sensors.
Ying He, Sung Min Park
doaj +2 more sources
Information Processing in Agriculture, 2014 Time to digital converter (TDC) is a key block for time-gated single photon avalanche diode (SPAD) arrays for Raman spectroscopy that applicable in the agricultural products and food analysis. In this paper a new dual slope time to digital converter that
Mahdi Rezvanyvardom +2 more
doaj +2 more sources
Dickson-Charge-Pump-Based Voltage-to-Time Conversion for Time-Based ADCs in 28-nm CMOS
IEEE Open Journal of Circuits and Systems, 2021 This article demonstrates a digitally friendly time-based analog-to-digital converter (ADC) exploiting Dickson charge-pump (CP) as part of a voltage-to-time conversion (VTC) implemented in 28-nm CMOS. In the proposed technique, the Dickson CP generates a
Ali Esmailiyan +4 more
doaj +1 more source
Research of a carry chain TDC and its tap method
Dianzi Jishu Yingyong, 2022 A time to digital converter(TDC) is implemented using carry chains in Xilinx Kinex-7 FPGA. FPGA-TDC is calibrated bin-by-bin through the code density calibration method.
Li Haitao +4 more
doaj +1 more source
A Resolution Control Loop for TDC-Based Phase Detectors in ADPLLs
IEEE Access, 2023 This paper proposes a resolution control loop that runs in background to control the time resolution of a mid-rise Time to Digital Converter (TDC) used as a phase detector in All-Digital Phase Locked Loops (ADPLLs).
Abdelrahman Habib +2 more
doaj +1 more source
A Fast-Lock All-Digital Clock Generator for Energy Efficient Chiplet-Based Systems
IEEE Access, 2022 An all-digital clock frequency multiplier that achieves excellent locking time for an energy-efficient chiplet-based system-on-chip (SoC) design is presented.
Junghoon Jin, Seungjun Kim, Jongsun Kim
doaj +1 more source
Sensors, 2023 We present a Tapped Delay Line (TDL)-based Time to Digital Converter (TDC) using Wave Union type A (WU-A) architecture for applications that require high-precision time interval measurements with low size, weight, power, and cost (SWaP-C) requirements ...
Saleh M. Alshahry +3 more
doaj +1 more source
A Low-Resources TDC for Multi-Channel Direct ToF Readout Based on a 28-nm FPGA
Sensors, 2021 In this paper, we present a proposed field programmable gate array (FPGA)-based time-to-digital converter (TDC) architecture to achieve high performance with low usage of resources.
Mojtaba Parsakordasiabi +3 more
doaj +1 more source
IEEE Transactions on Quantum Engineering, 2022 An almost all-digital time-to-digital converter (TDC) possessing subpicosecond resolutions, scalable dynamic ranges, high linearity, high noise immunity, and moderate conversion rates can be achieved by a random sampling-and-averaging (RSA) approach with
Tony Wu, Tzu-Chien Hsueh
doaj +1 more source