Results 31 to 40 of about 118,706,258 (232)

A 13-Bit, 12-ps Resolution Vernier Time-to-Digital Converter Based on Dual Delay-Rings for SPAD Image Sensor

open access: yesSensors, 2021
A three-dimensional (3D) image sensor based on Single-Photon Avalanche Diode (SPAD) requires a time-to-digital converter (TDC) with a wide dynamic range and fine resolution for precise depth calculation. In this paper, we propose a novel high-performance
Zunkai Huang   +6 more
doaj   +1 more source

An 8-bit TDC implemented with two nested Johnson counters

open access: yesTecnología en Marcha, 2023
This work presents a Time-to-Digital Converter implemented using two nested Johnson counters and suitable for time-lapse measurement applications. The proposed structure is composed of two 4-bit nested counters, two digital-logic control networks, two ...
Jonathan Santiago-Fernandez   +3 more
doaj   +1 more source

Exponential extended flash time-to-digital converter [PDF]

open access: yes, 2016
IEEE International Nordic-Mediterranean Workshop on Time-to-Digital Converters and Applications (NoMe - TDC 2016), Krakow, Poland, June, 2016The digital-to-time converter (DTC)-based all- digital phase locked loop (ADPLL) attracts more and more attention
Chen, Peng   +3 more
core   +1 more source

Cross-Talk Issues in Time Measurements

open access: yesIEEE Access, 2021
The enormous diffusion of Time-Mode circuits, in particular Time-to-Digital Converter (TDC) time measurement circuits, and at the same time the dizzying increase in parallel channels required by the most recent applications, for example in the automotive
Nicola Lusardi   +4 more
doaj   +1 more source

Widening and narrowing of time interval due to single‐event transients in 45 nm vernier‐type TDC

open access: yesIET Circuits, Devices and Systems, 2017
Single‐event transients (SETs) due to heavy‐ion (HI) strikes adversely affect the electronic circuits in sub‐100 nm regime in radiation environment.
Pasupathy K. Ramaniharan, Bindu Boby
doaj   +1 more source

Time-Mode Signal Quantization for Use in Sigma-Delta Modulators [PDF]

open access: yesAUT Journal of Electrical Engineering, 2016
The rapid scaling in modern CMOS technology has motivated the researchers to design new analog-to-digital converter (ADC) architectures that can properly work in lower supply voltage.
Mohsen Tamaddon, Mohammad Yavari
doaj   +1 more source

Low Resource FPGA Based Time-to-Digital Converter [PDF]

open access: yes, 2016
For the precise measurement of the time difference between the arrival of different signals coming from the different channels, the time-to-digital converter (TDC) implemented in Field Programmable Gate Array (FPGA) is a very useful device.
Basab B. Purkayastha, Kaustubh Bhattacharyya, Ragib Nasir Ahmed, Sabyasachi Bhattacharyya,
core   +1 more source

A Scalable Sub-Picosecond TDC Based on Analog Sampling of Dual-Phase Signals from a Free-Running Oscillator. [PDF]

open access: yesSensors (Basel)
This work presents a novel time-to-digital converter based on the analog sampling of dual-phase periodic signals generated from a free-running oscillator.
Cardella R   +9 more
europepmc   +2 more sources

5.7 ps Resolution Time-to-Digital Converter Implementation Using Routing Path Delays

open access: yesElectronics, 2023
A tapped delay line (TDL)-based time-to-digital converter (TDC) implemented on an FPGA (Field Programmable Gate Array) is sensitive to nonlinearities because of significant variations in the delay of the delay elements.
Roza Teklehaimanot Siecha   +3 more
semanticscholar   +1 more source

A novel time to digital converter architecture for time of flight positron emission tomography

open access: yes, 2013
Positron emission tomography (PET) is a molecular imaging technique that provides images of physiological processes inside the body. In clinical applications, PET image quality benefits from the time of flight (TOF) feature.
Luca Fanucci   +11 more
core   +1 more source

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