Results 11 to 20 of about 118,706,258 (232)
62.5 ps LSB resolution multiphase clock Time to Digital Converter (TDC) implemented on FPGA
Journal of King Saud University - Engineering Sciences, 2022 A 13-bit Time to Digital Converter is implemented using multiphase clock technique. Xilinx’s Virtex 5 FPGA platform is used to realize the TDC architecture. One PLL within the FPGA works as a clock synthesizer to multiply the reference clock to 500 MHz.
Mahantesh Mattada, Hansraj Guhilot
exaly +5 more sources
A Coarse-Fine Time-to-Digital Converter
ITM Web of Conferences, 2017 A design of time-to-digital converter (TDC) using a coarse-fine conversion scheme is presented. The coarse stage was accomplished by a delay line, and used a loop counter at the end of the delay line to achieve wide dynamic range. The fine stage utilized
Chen Ya-Qian, Lin Xiao-Gang, Meng Li-Ya
core +3 more sources
A Novel Cyclic Time to Digital Converter Based on Triple-Slope Interpolation and Time Amplification [PDF]
Radioengineering, 2015 This paper investigates a novel cyclic time-to-digital converter (TDC) which employs triple-slope analog interpolation and time amplification techniques for digitizing the time interval between the rising edges of two input signals(Start and Stop).
M. Rezvanyvardom +2 more
core +2 more sources
Sensors, 2023 We present a Tapped Delay Line (TDL)-based Time to Digital Converter (TDC) using Wave Union type A (WU-A) architecture for applications that require high-precision time interval measurements with low size, weight, power, and cost (SWaP-C) requirements ...
Saleh M. Alshahry +3 more
semanticscholar +3 more sources
Sensors, 2020 This paper presents a reconfigurable time-to-digital converter (TDC) used to quantize the phase of the impedance in electrical impedance spectroscopy (EIS).
Hyung-Joun Yoo +15 more
core +2 more sources
Sensors, 2022 Time-to-digital converter (TDC) is the key technology to realize accurate time delay measurement in high-precision optical fiber time-frequency transmission and synchronization, optical sensing and many scientific applications.
Xiang-Yu Mao +5 more
semanticscholar +3 more sources
An Observer-Data-Path Decoupled Time-Domain ADC with Three-Stage Digital Background Calibration in 28 nm CMOS. [PDF]
Micromachines (Basel)This paper presents an observer–data-path decoupled time-domain ADC with three-stage digital background calibration, designed and comprehensively verified through post-layout simulations in 28 nm CMOS for highly integrated micro-systems. In scaled nodes,
Qin C, Liu B, Wang R, Li L, Zhang C.
europepmc +2 more sources
A CMOS Integrator-Based Clock-Free Time-to-Digital Converter for Home-Monitoring LiDAR Sensors
Sensors, 2022 This paper presents a nine-bit integrator-based time-to-digital converter (I-TDC) realized in a 180 nm CMOS technology for the applications of indoor home-monitoring light detection and ranging (LiDAR) sensors.
Ying He, Sung Min Park
doaj +1 more source
Dickson-Charge-Pump-Based Voltage-to-Time Conversion for Time-Based ADCs in 28-nm CMOS
IEEE Open Journal of Circuits and Systems, 2021 This article demonstrates a digitally friendly time-based analog-to-digital converter (ADC) exploiting Dickson charge-pump (CP) as part of a voltage-to-time conversion (VTC) implemented in 28-nm CMOS. In the proposed technique, the Dickson CP generates a
Ali Esmailiyan +4 more
doaj +1 more source