Results 11 to 20 of about 1,191 (163)
A Coarse-Fine Time-to-Digital Converter
ITM Web of Conferences, 2017 A design of time-to-digital converter (TDC) using a coarse-fine conversion scheme is presented. The coarse stage was accomplished by a delay line, and used a loop counter at the end of the delay line to achieve wide dynamic range. The fine stage utilized
Chen Ya-Qian, Meng Li-Ya, Lin Xiao-Gang
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A Novel Cyclic Time to Digital Converter Based on Triple-Slope Interpolation and Time Amplification [PDF]
Radioengineering, 2015 This paper investigates a novel cyclic time-to-digital converter (TDC) which employs triple-slope analog interpolation and time amplification techniques for digitizing the time interval between the rising edges of two input signals(Start and Stop).
M. Rezvanyvardom, E. Farshidi
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Firmware-only implementation of time-to-digital converter (TDC) in field-programmable gate array (FPGA) [PDF]
2003 IEEE Nuclear Science Symposium. Conference Record (IEEE Cat. No.03CH37515), 2003 A Time-to-Digital Converter (TDC) implemented in general purpose field-programmable gate array, (FPGA) for the Fermilab CKM experiment will be presented. The TDC uses a delay chain and register array structure to produce lower bits in addition to higher bits from a clock counter.
Wu, Jinyuan, Shi, Zonghan, Wang, Irena Y
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Sensors, 2020 This paper presents a reconfigurable time-to-digital converter (TDC) used to quantize the phase of the impedance in electrical impedance spectroscopy (EIS).
Sounghun Shin +7 more
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High-Resolution Time-to-Digital Converters (Tdcs) with a Bidirectional Encoder
SSRN Electronic Journal, 2022 A high-resolution time-to-digital converter (TDC) based on wave union (four-edge WU A), dual-sampling, and sub-TDL methods is proposed and implemented in a 16-nm Xilinx UltraScale+ field-programmable gate array (FPGA). We combine WU and dual-sampling techniques to achieve a high resolution.
Wang, Yu +3 more
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PLI-TDC: Super Fine Delay-Time Based Physical-Layer Identification with Time-to-Digital Converter for In-Vehicle Networks [PDF]
Proceedings of the 2021 ACM Asia Conference on Computer and Communications Security, 2021 Recently, cyberattacks on Controller Area Network (CAN) which is one of the automotive networks are becoming a severe problem. CAN is a protocol for communicating among Electronic Control Units (ECUs) and it is a de-facto standard of automotive networks.
Shuji Ohira +3 more
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Improved FPGA time-to-digital converter architecture to improve precision, converter linearity and reduce dead-time [PDF]
, 2020 Time-to-digital converters (TDCs) and time correlated single photon counters (TCSPC) are instruments commonly used in LiDAR systems, quantum optics experiments and many other applications.
Richard W. Nock +5 more
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Mutually Coupled Time-to-Digital Converters (TDCs) for Direct Time-of-Flight (dTOF) Image Sensors ‡ [PDF]
Sensors, 2018 Direct time-of-flight (dTOF) image sensors require accurate and robust timing references for precise depth calculation. On-chip timing references are well-known and understood, but for imaging systems where several thousands of pixels require seamless references, area and power consumption limit the use of more traditional synthesizers, such as phase ...
Augusto Ronchini Ximenes +2 more
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Sensors, 2021 A three-dimensional (3D) image sensor based on Single-Photon Avalanche Diode (SPAD) requires a time-to-digital converter (TDC) with a wide dynamic range and fine resolution for precise depth calculation. In this paper, we propose a novel high-performance
Zunkai Huang +6 more
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Applied Sciences, 2018 This paper presents a time-to-digital converter (TDC) based on a field programmable gate array (FPGA) with a tapped delay line (TDL) architecture. This converter employs dual delay lines (DDLs) to enable real-time calibrations, and the proposed DDL-TDC ...
Yuan-Ho Chen
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