Results 21 to 30 of about 702 (169)
Applied Sciences, 2018 This paper presents a time-to-digital converter (TDC) based on a field programmable gate array (FPGA) with a tapped delay line (TDL) architecture. This converter employs dual delay lines (DDLs) to enable real-time calibrations, and the proposed DDL-TDC ...
Yuan-Ho Chen
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Sensors, 2021 A three-dimensional (3D) image sensor based on Single-Photon Avalanche Diode (SPAD) requires a time-to-digital converter (TDC) with a wide dynamic range and fine resolution for precise depth calculation. In this paper, we propose a novel high-performance
Zunkai Huang +6 more
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An 8-bit TDC implemented with two nested Johnson counters
Tecnología en Marcha, 2023 This work presents a Time-to-Digital Converter implemented using two nested Johnson counters and suitable for time-lapse measurement applications. The proposed structure is composed of two 4-bit nested counters, two digital-logic control networks, two ...
Jonathan Santiago-Fernandez +3 more
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Sensors, 2022 Time-to-digital converter (TDC) is the key technology to realize accurate time delay measurement in high-precision optical fiber time-frequency transmission and synchronization, optical sensing and many scientific applications.
Xiangyu Mao +5 more
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Cross-Talk Issues in Time Measurements
IEEE Access, 2021 The enormous diffusion of Time-Mode circuits, in particular Time-to-Digital Converter (TDC) time measurement circuits, and at the same time the dizzying increase in parallel channels required by the most recent applications, for example in the automotive
Nicola Lusardi +4 more
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Sensors, 2020 This paper presents a reconfigurable time-to-digital converter (TDC) used to quantize the phase of the impedance in electrical impedance spectroscopy (EIS).
Sounghun Shin +7 more
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A Novel Cyclic Time to Digital Converter Based on Triple-Slope Interpolation and Time Amplification [PDF]
Radioengineering, 2015 This paper investigates a novel cyclic time-to-digital converter (TDC) which employs triple-slope analog interpolation and time amplification techniques for digitizing the time interval between the rising edges of two input signals(Start and Stop).
M. Rezvanyvardom, E. Farshidi
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Time-Mode Signal Quantization for Use in Sigma-Delta Modulators [PDF]
AUT Journal of Electrical Engineering, 2016 The rapid scaling in modern CMOS technology has motivated the researchers to design new analog-to-digital converter (ADC) architectures that can properly work in lower supply voltage.
Mohsen Tamaddon, Mohammad Yavari
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Widening and narrowing of time interval due to single‐event transients in 45 nm vernier‐type TDC
IET Circuits, Devices and Systems, 2017 Single‐event transients (SETs) due to heavy‐ion (HI) strikes adversely affect the electronic circuits in sub‐100 nm regime in radiation environment.
Pasupathy K. Ramaniharan, Bindu Boby
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A Coarse-Fine Time-to-Digital Converter
ITM Web of Conferences, 2017 A design of time-to-digital converter (TDC) using a coarse-fine conversion scheme is presented. The coarse stage was accomplished by a delay line, and used a loop counter at the end of the delay line to achieve wide dynamic range. The fine stage utilized
Chen Ya-Qian, Meng Li-Ya, Lin Xiao-Gang
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