Results 21 to 30 of about 1,191 (163)

An 8-bit TDC implemented with two nested Johnson counters

Tecnología en Marcha, 2023
This work presents a Time-to-Digital Converter implemented using two nested Johnson counters and suitable for time-lapse measurement applications. The proposed structure is composed of two 4-bit nested counters, two digital-logic control networks, two ...
Jonathan Santiago-Fernandez, Alejandro Diaz-Sanchez, Gregorio Zamora-Mejia, Jose Miguel Rocha-Perez   +3 more
doaj   +1 more source

Cross-Talk Issues in Time Measurements

IEEE Access, 2021
The enormous diffusion of Time-Mode circuits, in particular Time-to-Digital Converter (TDC) time measurement circuits, and at the same time the dizzying increase in parallel channels required by the most recent applications, for example in the automotive
Nicola Lusardi, Nicola Corna, Fabio Garzetti, Simone Salgaro, Angelo Geraci   +4 more
doaj   +1 more source

A Low Temperature Coefficient Time-to-Digital Converter with 1.3 ps Resolution Implemented in a 28 nm FPGA

Sensors, 2022
Time-to-digital converter (TDC) is the key technology to realize accurate time delay measurement in high-precision optical fiber time-frequency transmission and synchronization, optical sensing and many scientific applications.
Xiangyu Mao, Fei Yang, Fang Wei, Jiawen Shi, Jian Cai, Haiwen Cai   +5 more
doaj   +1 more source

Time-Mode Signal Quantization for Use in Sigma-Delta Modulators [PDF]

AUT Journal of Electrical Engineering, 2016
The rapid scaling in modern CMOS technology has motivated the researchers to design new analog-to-digital converter (ADC) architectures that can properly work in lower supply voltage.
Mohsen Tamaddon, Mohammad Yavari
doaj   +1 more source

Widening and narrowing of time interval due to single‐event transients in 45 nm vernier‐type TDC

IET Circuits, Devices and Systems, 2017
Single‐event transients (SETs) due to heavy‐ion (HI) strikes adversely affect the electronic circuits in sub‐100 nm regime in radiation environment.
Pasupathy K. Ramaniharan, Bindu Boby
doaj   +1 more source

A 100–750 MS/s 11-Bit Time-to-Digital Converter With Cyclic-Coupled Ring Oscillator

IEEE Access, 2021
This paper presents the first measured cyclic-coupled ring oscillator (CCRO) time-to-digital converter (TDC). The CCRO realizes a robust true time-domain delay interpolation with sub-gate-delay resolution.
Okko Jarvinen, Vishnu Unnikrishnan, Waqas Siddiqui, Teuvo Korhonen, Kimmo Koli, Kari Stadius, Marko Kosunen, Jussi Ryynanen   +7 more
doaj   +1 more source

A novel time to digital converter architecture for time of flight positron emission tomography

, 2013
Positron emission tomography (PET) is a molecular imaging technique that provides images of physiological processes inside the body. In clinical applications, PET image quality benefits from the time of flight (TOF) feature.
Luca Fanucci, Roberto Roncella, Nahema Marino, Sergio Saponara, Maria Giuseppina Bisogni, SAPONARA, SERGIO, BISOGNI, MARIA GIUSEPPINA, FANUCCI, LUCA, BARONTI, FEDERICO, Alberto Del Guerra, RONCELLA, ROBERTO, Federico Baronti   +11 more
core   +1 more source

Design and Analysis of a Multirate 5-bit High-Order 52 fs_rms Δ ∑ Time-to-Digital Converter Implemented on 40 nm Altera Stratix IV FPGA

IEEE Access, 2021
This paper describes FPGA implementation of a high-order continuous-time multi-stage noise-shaping (MASH) $\Delta \Sigma $ time-to-digital converter (TDC).
Ahmad Mouri Zadeh Khaki, Ebrahim Farshidi, Karim Ansari Asl, Sawal Hamid Md Ali, Masuri Othman   +4 more
doaj   +1 more source

CMOS single photon sensor with in-pixel TDC for Time-of-Flight applications

, 2013
A CMOS imager that combines single photon sensitivity with photon timing capabilities has been developed for Time-Of-Flight (TOF) measurements and for Time-Correlated Single-Photon Counting (TCSPC) applications.
LUSSANA, RUDI, TAMBORINI, DAVIDE, TOSI, ALBERTO, R. Lussana, S. Tisa, F. Zappa, F. Villa, B. Markovic, MARKOVIC, BOJAN, TISA, SIMONE, D. Bronzi, BRONZI, DANILO, ZAPPA, FRANCO, D. Tamborini, A. Tosi, VILLA, FEDERICA ALBERTA   +15 more
core   +1 more source

An FPGA-Integrated Time-to-Digital Converter Based on a Ring Oscillator for Programmable Delay Line Resolution Measurement

Journal of Electrical and Computer Engineering, 2014
We describe the architecture of a time-to-digital converter (TDC), specially intended to measure the delay resolution of a programmable delay line (PDL).
Chao Chen, Shengwei Meng, Zhenghuan Xia, Guangyou Fang, Hejun Yin   +4 more
doaj   +1 more source