Results 11 to 20 of about 22,732 (218)
Open-Source HW/SW Co-Simulation Using QEMU and GHDL for VHDL-Based SoC Design
Electronics (Switzerland), 2023 Hardware/software co-simulation is a technique that can help design and validate digital circuits controlled by embedded processors. Co-simulation has largely been applied to system-level models, and tools for SystemC or SystemVerilog are readily ...
Giorgio Biagetti +2 more
exaly +2 more sources
Modelling, simulation and verification of 4-phase adiabatic logic design: A VHDL-Based approach
The Integration VLSI Journal, 2019 The design and functional verification of the 4-phase adiabatic logic implementation take longer due to the complexity of synchronizing the power-clock phases. Additionally, as the adiabatic system scales, the amount of time in debugging errors increases,
Sachin Maheshwari, Izzet Kale
exaly +2 more sources
VHDL Descriptions for the FPGA Implementation of PWL-Function-Based Multi-Scroll Chaotic Oscillators. [PDF]
PLoS ONE, 2016 Nowadays, chaos generators are an attractive field for research and the challenge is their realization for the development of engineering applications.
Esteban Tlelo-Cuautle +3 more
doaj +2 more sources
Design and Implementation of POSIT Based Adder and Multiplier in Verilog HDL [PDF]
E3S Web of Conferences, 2023 Due to recent developments, the POSIT number system, winch has been planned as a successor for numbers that are expressed in IEEE floating-point, which are in the focus of advances in arithmetic.
Sanivarapu Rambabu +5 more
doaj +1 more source
Transfer of Analogies in Traditional Programming Languages to Teaching VHDL
Sakarya University Journal of Computer and Information Sciences, 2022 One of the languages available to describe a digital system in FPGA is the VHDL language. Since programming in hardware requires a different way of thinking than developing software, the students face some difficulties when trying to design in VHDL ...
Ali Gülbağ, Halit Öztekin
doaj +1 more source
Implementation and testing of a FSK demodulator
Revista Elektrón, 2021 This work describes the implementation and testing of a FSK demodulator, within the framework of a modem re-engineering for navy communications. It was developed over a Spartan 6 XCSLX25 FPGA with its code in VHDL.
Leandro José Ferrari +3 more
doaj +1 more source
Hardware acceleration of number theoretic transform for zk‐SNARK
Engineering Reports, EarlyView., 2023 An FPGA‐based hardware accelerator with a multi‐level pipeline is designed to support the large‐bitwidth and large‐scale NTT tasks in zk‐SNARK. It can be flexibly scaled to different scales of FPGAs and has been equipped in the heterogeneous acceleration system with the help of HLS and OpenCL.
Haixu Zhao +6 more
wiley +1 more source
Sakarya University Journal of Computer and Information Sciences, 2023 Encryption algorithms work with very large key values to provide higher security. In order to process high-capacity data in real-time, we need advanced hardware structures.
Kenan Baysal, Deniz Taşkın
doaj +1 more source
Synthesis of parallel adders from if-decision diagrams
Системный анализ и прикладная информатика, 2020 Addition is one of the timing critical operations in most of modern processing units. For decades, extensive research has been done devoted to designing higher speed and less complex adder architectures, and to developing advanced adder implementation ...
A. A. Prihozhy
doaj +1 more source
Design and Implementation of Synthesizable VHDL Model for General PCMCIA I/O Cards Controller [PDF]
Engineering and Technology Journal, 2008 The portable and nomadic computer market has driven the development ofPCMCIA Cards to address the expansion needs for the user. These cards provide avast variety of hardware devices which are rugged, credit-card sized, lightweight,and power efficient ...
Yousra Abd Mohammed
doaj +1 more source