Results 261 to 270 of about 76,192 (288)

Flow Control Mechanism for Wireless Network-on-Chip

2013 10th International Conference on Information Technology: New Generations, 2013
Network on chip (NoC) provides a network-based interconnect infrastructure that facilitates the communications among a slew of function cores in a modern System-on-chip (SoC) design. Apart from topology, switching technique and routing strategy adopted in an NoC, flow control scheme that regulates the packet injection rates is another determining ...
Ling Wang, Zhen Wang, Yingtao Jiang
openaire   +1 more source

Kilo-core Wireless Network-on-Chips (NoCs) Architectures

Proceedings of the Second Annual International Conference on Nanoscale Computing and Communication, 2015
As energy-efficiency and high-performance of Networks-on-Chips (NoCs) communication fabric have become critical, limited bandwidth and fundamental signaling limitations of metallic interconnects have forced academia and industry to consider emerging technologies such as wireless interconnects as an alternate solution.
Avinash K. Kodi, Md Ashif I. Sikder, Dominic DiTomaso, Savas Kaya, Soumyasanta Laha, David Matolak, William Rayess   +6 more
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Novel Hybrid Wired-Wireless Network-on-Chip Architectures

Proceedings of the 9th International Symposium on Networks-on-Chip, 2015
Existing wireless communication interface of Hybrid Wired-Wireless Network-on-Chip (WiNoC) has 3-dimensional free space signal radiation which has high power dissipation and drastically affects the received signal strength. In this paper, we propose a CMOS based 2-dimensional (2-D) waveguide communication fabric that is able to match the channel ...
Michael Opoku Agyeman, Wen Zong, Ji-Xiang Wan, Alex Yakovlev, Kenneth Tong, Terrence Mak   +5 more
openaire   +1 more source

Effect of Routing Algorithm on Wireless Network-on-Chip Performance

2020 Second International Sustainability and Resilience Conference: Technology and Innovation in Building Designs(51154), 2020
Multiprocessors-system on chips (MPSoC) was primarily based on conventional network-on-chip (NoC) technology. Still, the performance benefit of NoC architecture was constrained by the long-distance of the multi-hop connectivity in NoC resulted in high latency and energy dissipation.
Ayodeji Ireti Fasiku, Benson Olabode Ojedayo, Oghenerukevwe Elohor Oyinloye   +2 more
openaire   +1 more source

Network on a chip: modeling wireless networks with asynchronous VLSI

IEEE Communications Magazine, 2001
We introduce the notion of a network on a chip: a programmable asynchronous VLSI architecture for fast and efficient simulation of wireless networks. The approach is inspired by the remarkable similarity between networks and asynchronous VLSI. Our approach results in simulators that can evaluate network scenarios much faster than real time, enabling a ...
R. Manohar, C. Kelly
openaire   +1 more source

Wideband mmWave Antenna for Wireless Network-On-Chip/Network-On-Board Communications

2017
Wireless network-on-chip (WiNoC) and network-on-board (WiNoB) are new paradigms, which allow Gb/s communication among processing cores and/or memories integrated in the same system-on-chip or in the same electronic board. This work presents the design of an antenna, operating at mm-waves (mmW), which can be printed on-board or on-chip using the top ...
SAPONARA, SERGIO, NERI, BRUNO
openaire   +2 more sources

Using network calculus for analysing wired-wireless network on chip

2013 World Congress on Computer and Information Technology (WCCIT), 2013
Chip designs integrate hundreds and even thousands of smaller cores on a single chip. As such, the design and implementation of the underlying communication fabric is becoming a critical challenge. Network-on-Chips (NoCs) is a novel design paradigm that replaces the traditional bus-based networks to overcome the dual problems of scalability and latency.
Neila Moussa, Rached Tourki
openaire   +1 more source

Energy-efficient wireless network-on-chip architecture with log-periodic on-chip antennas

Proceedings of the 24th edition of the great lakes symposium on VLSI, 2014
On-chip wireless interconnects have emerged as a promising alternative to conventional wireline interconnects in Network-on-Chip (NoC) fabrics for multicore systems. However, it is not practical in the immediate future to arbitrarily scale up the number of wireless links without innovations in the physical layer.
Md Shahriar Shamim, Naseef Mansoor, Aman Samaiyar, Amlan Ganguly, Sujay Deb, Shobha Sunndar Ram   +5 more
openaire   +1 more source

Wireless network-on-chip: a new era in multi-core chip design

2014 25nd IEEE International Symposium on Rapid System Prototyping, 2014
The Network-on-Chip (NoC) is an enabling technology to integrate large numbers of embedded cores on a single die. The existing method of implementing a NoC with planar metal interconnects is deficient due to high latency and significant power consumption arising out of multi-hop links used in data exchange.
Sujay Deb, Hemanta Mondal
openaire   +1 more source

Wireless-assisted multiple network on chip using microring resonators

Microprocessors and Microsystems, 2018
Abstract The multiple network-on-Chip (multi-NoC) architecture is an attractive solution to scale on-chip network bandwidth; however, its performance is influenced by its overall communication infrastructure. Incorporating wireless links attract the traffic and cause the power-gated components to stay in sleep state for a longer period of time.
Ali Shahidinejad, Saeed Fathi
openaire   +1 more source