Results 11 to 20 of about 2,098 (165)
This letter presents an efficient built‐in error detection methodology for 3D NAND flash memories, in which fast page‐oriented data comparison and column parallel error detection are firstly proposed.
HM. Cao +5 more
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To achieve high density, the spacer length of three dimensional (3D) NAND device has been scaled down. When the program/erase cycle repeats, problems such as electrons accumulation in the inter-cell region are occurred. To solve this problem, a method of
Yun-Jae Oh +4 more
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Hydrogen Source and Diffusion Path for Poly-Si Channel Passivation in Xtacking 3D NAND Flash Memory
Poly-Si channels need well passivated by using hydrogen passivation process in 3D NAND flash memories for better poly-Si quality with low trap density.
Xinshuai Shen +7 more
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Self-Learning Hot Data Prediction: Where Echo State Network Meets NAND Flash Memories [PDF]
© 2019 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new ...
Ai, Jiaqiu +4 more
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Effect of the Blocking Oxide Layer With Asymmetric Taper Angles in 3-D NAND Flash Memories
The tapered channel effect is a major concern in three-dimensional (3-D) NAND technology because the effect causes differences in the electrical characteristics, including the threshold voltage (VT), between the upper and the lower cells.
Jun Gyu Lee +4 more
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Solid-state drives represent the preferred backbone storage solution thanks to their low latency and high throughput capabilities compared to mechanical hard disk drives.
Michela Borghesi +3 more
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Channel Modeling and Quantization Design for 3D NAND Flash Memory
As the technology scales down, two-dimensional (2D) NAND flash memory has reached its bottleneck. Three-dimensional (3D) NAND flash memory was proposed to further increase the storage capacity by vertically stacking multiple layers. However, the new architecture of 3D flash memory leads to new sources of errors, which severely affects the reliability ...
Cheng Wang +5 more
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3D-NAND flash memory based neuromorphic computing
A neuromorphic chip is an emerging AI chip. The neuromorphic chip is based on non-Von Neumann architecture, and it simulates the structure and working principle of the human brain. Compared with non-Von Neumann architecture AI chips, the neuromorphic chips have significant improvement of efficiency and energy consumption advantages.
Yang-Yang Chen +3 more
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Analysis of HBM Failure in 3D NAND Flash Memory
Electrostatic discharge (ESD) events are the main factors impacting the reliability of NAND Flash memory. The behavior of human body model (HBM) failure and the corresponding physical mechanism of 3D NAND Flash memory are investigated in this paper. A catastrophic burn-out failure during HBM zapping is first presented. Analysis shows that NMOS fingers’
Biruo Song +6 more
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First Evidence of Temporary Read Errors in TLC 3D-NAND Flash Memories Exiting From an Idle State
This paper presents a new reliability threat that affects 3D-NAND Flash memories when a read operation is performed exiting from an idle state. In particular, a temporary large increase of the fail bits count is reported for the layers read as first ...
Cristian Zambelli +3 more
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