Results 41 to 50 of about 562 (143)
Advanced Science, EarlyView.ABSTRACT Strain is a proven technique for modifying the bandgap and enhancing carrier mobility in 2D materials. Most current strain engineering techniques rely on the post‐growth transfer of these atomically thin materials from growth substrates to target surfaces, limiting their integration into nanoelectronics.
Berke Erbas +8 more
wiley +1 more source
Advanced Electronic Materials, EarlyView.This work electrically characterizes sixteen logic gates built from three‐independent‐gate reconfigurable transistors fabricated on full‐scale 300 mm wafers using the industrial 22 nm fully depleted FDSOI process of GlobalFoundries. Static and time‐resolved measurements confirm correct operation, including a 1‐bit adder and reconfigurable AOI/OAI ...
Juan P. Martinez +12 more
wiley +1 more source
Design and investigation of a delay controlled ALU employing FinFET& CNTFET technologies
e-Prime: Advances in Electrical Engineering, Electronics and EnergyThe Arithmetic and Logic Unit (ALU) is a crucial logical element of real-time semiconductor devices. Conventional ALUs that are built using Complementary Metal Oxide Semiconductor (CMOS) technology exhibit increased power usage and processing delays ...
Ch JayaPrakash +2 more
doaj +1 more source
Advanced Intelligent Discovery, EarlyView.This article outlines how artificial intelligence could reshape the design of next‐generation transistors as traditional scaling reaches its limits. It discusses emerging roles of machine learning across materials selection, device modeling, and fabrication processes, and highlights hierarchical reinforcement learning as a promising framework for ...
Shoubhanik Nath +4 more
wiley +1 more source
Parametric Analysis of Spiking Neurons in 16 nm Fin Field‐Effect Transistor Technology
Advanced Intelligent Discovery, EarlyView.Energy efficient computing has driven a shift toward brain‐inspired neuromorphic hardware. This study explores the design of three distinct silicon neuron topologies implemented in 16 nm fin field‐Effect transistor technology. While the Axon‐Hillock design achieves gigahertz throughput, its functional fragility persists. The Morris–Lecar model captures
Logan Larsh +3 more
wiley +1 more source
CMOS λογική οικογένεια με χρήση διοδικού τρανζίστορ με χαμηλή δυναμική κατανάλωση ενέργειας [PDF]
, 2012 165 ...
Κατσαρού, Αικατερίνη
core +1 more source
Advanced Materials Technologies, Volume 11, Issue 5, 6 March 2026.This review explores recent advances in digital micromirror device (DMD)‐based lithography, focusing on its programmable light modulation, multi‐material compatibility, and dimensional patterning strategies. It highlights innovations from optical system design to materials integration and multifunctional applications, positioning DMD lithography as a ...
Yubin Lee +5 more
wiley +1 more source
Electronics LettersIn this letter, to improve the performance and reduce leakage currents of bulk low‐temperature multi‐layer SiGe/Si superlattice (SL) fin field‐effect transistors (FinFETs), a p‐type omega‐shaped channel (Ω‐channel) SL FinFET is realized by etching a Si ...
Xu‐Lei Qin +10 more
doaj +1 more source
IEEE Journal of the Electron Devices SocietyIn this paper, the frequency (f) dependence of trap generation in Si n-channel fin field-effect transistors (n-FinFETs) under AC positive bias temperature instability (PBTI) stress is investigated by fast direct-current current-voltage (DCIV) method and ...
Yunfei Shi +14 more
doaj +1 more source
Leakage Power Reduction for Deeply-Scaled FinFET Circuits Operating in Multiple Voltage Regimes Using Fine-Grained Gate- Length Biasing Technique [PDF]
, 2020 -With the aggressive downscaling of the process technologies and importance of battery-powered systems, reducing leakage power consumption has become one of the most crucial design challenges for IC designers.
Ji Li +4 more
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