Results 51 to 60 of about 562 (143)

III-V Nanowire MOSFET High-Frequency Technology Platform [PDF]

open access: yes, 2021
This thesis addresses the main challenges in using III-V nanowireMOSFETs for high-frequency applications by building a III-Vvertical nanowire MOSFET technology library.
Andric, Stefan
core  

Ternary Content‐Addressable Memory Using One Capacitor and One Nanoelectromechanical Memory Switch for Data‐Intensive Applications

open access: yesAdvanced Intelligent Systems, Volume 8, Issue 3, March 2026.
A charge‐domain ternary content‐addressable memory using one capacitor one nanoelectromechanical memory switch (1C‐1N TCAM) is proposed for energy‐efficient, high‐reliability computations. Integrated with the back‐end‐of‐line process, the 1C‐1N TCAM leverages the air gap capacitance to achieve a high capacitance ratio and ternary functionality.
Jin Wook Lee   +5 more
wiley   +1 more source

Hybrid Convolutional Neural Network‐Analytical Model for Prediction of Line Edge Roughness‐Induced Performance Variations in Fin‐Shaped Field‐Effect Transistor Devices and SRAM

open access: yesAdvanced Intelligent Systems, Volume 8, Issue 3, March 2026.
This work presents a hybrid model for predicting the electrical characteristics of fin‐shaped field‐effect transistor devices and SRAM with line edge roughness. The model consists of a convolutional neural network (CNN) and an analytical model that simulates the electrical characteristics of transistors using the outputs of CNN, enabling fast and ...
Jaehyuk Lim   +4 more
wiley   +1 more source

Low Power and Energy‐Efficient Design of MTJ/FinFET Circuits

open access: yesEngineering Reports, Volume 8, Issue 3, March 2026.
This work begins by outlining the fundamental concepts of MTJs, FinFETs, and the conventional hybrid CMOS/MTJ framework. It then explains the operating mechanism and configuration of the proposed STT‐MTJ/FinFET‐based OR logic gate. The final sections present the simulation outcomes and analyze the influence of FinFET fin variation.
Pillem Ramesh, Atul S. M. Tripathi
wiley   +1 more source

Impacts of Local Oxide Trapped Charge on Electrical and Capacitance Characteristics of SOI FinFet

open access: yesEast European Journal of Physics
In this work, the influence of the local oxide trapped charge on the transfer Id-Vg characteristics and capacitance of the gatetoI. INTRODUCTION source (drain) connection of the silicon-on-insulator (SOI) structure-based FinFET is simulated.
Atabek Atamuratov   +5 more
doaj   +1 more source

Ultrathin Hafnium‐Based Ferroelectric Devices for In‐Memory Computing Applications

open access: yesInformation &Functional Materials, Volume 3, Issue 1, Page 8-34, March 2026.
Hafnium‐based ferroelectric devices exhibit advantages in nonvolatile storage, low power consumption, and ultrahigh operation speed, positioning them as strong candidates for constructing hardware neural networks. ABSTRACT The discovery of ferroelectricity in HfO2‐based ferroelectrics at the ultrathin scale has reignited enthusiasm for ferroelectric ...
Chenghong Mo   +3 more
wiley   +1 more source

Utilizing MRAMs With Low Resistance and Limited Dynamic Range for Efficient MAC Accelerator

open access: yesIEEE Open Journal of Nanotechnology
The recent advancements in data mining, machine learning algorithms and cognitive systems have necessitated the development of neuromorphic processing engines which may enable resource and computationally intensive applications on the internet-of-Things (
Sateesh   +2 more
doaj   +1 more source

Design of 3C-SiC/Si vertical MOSFET [PDF]

open access: yes, 2015
Metal-Oxide-Semiconductor Field Effect transistor (MOSFET) has undergone scaling to improve performance, and it is presently at the sub-100nm technology node.
Reddy Veesam, Vamshi Vardhan
core   +1 more source

Harnessing Time‐Dependent Magnetic Texture Dynamics via Spin‐Orbit Torque for Physics‐Enhanced Neuromorphic Computing

open access: yesAdvanced Science, Volume 13, Issue 12, 27 February 2026.
A neuromorphic computing platform using spin‐orbit torque‐controlled magnetic textures is reported. The device implements bio‐inspired synaptic functions and achieves high performance in both pattern recognition (>93%) and combinatorial optimization (>95%), enabling unified processing of cognitive and optimization tasks.
Yifan Zhang   +13 more
wiley   +1 more source

Machine Learning‐Based Standard Compact Model Binning Parameter Extraction Methodology for Integrated Circuit Design of Next‐Generation Semiconductor Devices

open access: yesAdvanced Intelligent Systems, Volume 8, Issue 2, February 2026.
This study presents a neural network‐based methodology for Berkeley Short‐Channel IGFET Model–Common Multi‐Gate parameter extraction of gate‐all‐around field effect transistors, integrating binning adaptive sampling and transformer neural networks to efficiently capture current–voltage and capacitance–voltage characteristics.
Jaeweon Kang   +4 more
wiley   +1 more source

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