Results 81 to 90 of about 10,343 (214)

An RC snubber design method to achieve optimized switching noise‐loss trade‐off of cascode GaN HEMTs

open access: yesIET Power Electronics
The cascode gallium nitride high electron mobility transistors (GaN HEMTs) are very vulnerable to self‐sustained turn‐off oscillation due to their cascode configuration.
Peng Xue, Eckart Hoene, Pooya Davari
doaj   +1 more source

A digitally controlled threshold adjustment circuit in a 0.13um SiGe BiCMOS technology for receiving multilevel signals up to 80Gbps [PDF]

open access: yes, 2014
In this paper, a high bandwidth digitally controlled threshold adjustment circuit is proposed which can be used for demodulating high-speed multi-level signals. Simulations of the bandwidth are presented together with measurements of the control currents
Bauwelinck, Johan   +3 more
core   +1 more source

A K‐Band 4‐Channel Hybrid‐Packaged Phased‐Array Receiver With 1.6‐dB NF and 60‐dB Transmit Rejection

open access: yesElectronics Letters, Volume 61, Issue 1, January/December 2025.
The design utilizes WLCSP technology to integrate four GaAs LNAs and a 4‐channel CMOS beamformer into a single package for K/Ka‐band SATCOM. The GaAs IC features a 2‐stage self‐biased LNA and a 5th‐order band‐stop filter, achieving a low cascaded NF and high TX rejection.
Bai Song, Yong Fan
wiley   +1 more source

Low-power low-voltage chopped transconductance amplifier for noise and offset reduction [PDF]

open access: yes, 1997
This paper describes the principle and design of a CMOS low-power, low-voltage, chopped transconductance amplifier, for noise and offset reduction in mixed analogue digital applications. The operation is based on chopping and dynamic element matching, to
Nauta, B.   +2 more
core   +1 more source

A general weak nonlinearity model for LNAs [PDF]

open access: yes, 2008
This paper presents a general weak nonlinearity model that can be used to model, analyze and describe the distortion behavior of various low noise amplifier topologies in both narrowband and wideband applications.
Annema, Anne Johan   +4 more
core   +2 more sources

Ultra‐Low Noise Figure Ka‐Band MMIC LNA With Graded‐Channel GaN HEMTs

open access: yesElectronics Letters, Volume 61, Issue 1, January/December 2025.
We report broadband (20 GHz ‐ 40 GHz) low‐noise amplifiers in a cascode topology using graded‐channel GaN HEMTs, resulting in an excellent NF figure down to 1 dB with 15 dB gain per stage. ABSTRACT We report broadband (20 GHz ‐ 40 GHz) low‐noise amplifiers in a cascode topology using graded‐channel GaN HEMTs, resulting in an excellent NF figure down to
Joe Tai, Joel Wong, Jeong‐Sun Moon
wiley   +1 more source

A 28GHz, Switched-Cascode, Class E Amplifier in 22nm CMOS FDSOI Technology

open access: yesIEEE Journal of Microwaves
Using the stacking technique in CMOS technology for Power Amplifiers (PAs), allows the use of a higher supply voltage. This facilitates achieving a higher voltage swing, and delivering more output power while maintaining a high efficiency.
Nourhan Elsayed   +2 more
doaj   +1 more source

K‐band CMOS low‐noise amplifier with 180° phase shift function using cascode structure

open access: yesElectronics Letters, 2023
In this study, a K‐band CMOS low‐noise amplifier (LNA) with a 180° phase shift function is presented to reduce the chip area of the beamforming system.
Seongjin Jang   +2 more
doaj   +1 more source

Large-Area, Low-Noise, High Speed, Photodiode-Based Fluorescence Detectors with Fast Overdrive Recovery

open access: yes, 2005
Two large-area, low noise, high speed fluorescence detectors have been built. One detector consists of a photodiode with an area of 28 mm x 28 mm and a low noise transimpedance amplifier.
D. DeMille   +4 more
core   +3 more sources

A Low‐Power GaN Shift Register in GaN Monolithic Technology

open access: yesElectronics Letters, Volume 61, Issue 1, January/December 2025.
Gallium Nitride (GaN) semiconductor technology is advancing due to its favourable properties for high‐power switching applications, driving demand for monolithic circuit integration. This paper focuses on designing fundamental digital circuits to create memory circuits aimed at reducing power consumption and introduces a novel shift register topology ...
Michele Marrella   +3 more
wiley   +1 more source

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