Results 31 to 40 of about 34,539 (304)
Design of a Highly Robust Triple-Node-Upset Self-Recoverable Latch
IEEE Access, 2021 Due to semiconductor technology scaling, integrated circuits have become more sensitive to soft errors. To effectively tolerate multi-node-upsets caused by soft errors and reduce the power dissipation and delay of a latch, this paper proposes a novel ...
Hui Xu +4 more
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An Energy and Performance Exploration of Network-on-Chip Architectures [PDF]
, 2009 In this paper, we explore the designs of a circuit-switched router, a wormhole router, a quality-of-service (QoS) supporting virtual channel router and a speculative virtual channel router and accurately evaluate the energy-performance tradeoffs they ...
Arnab Banerjee +6 more
core +3 more sources
A variation tolerant data dependent clock gating approach for PSN attenuated low power digital IC
Ain Shams Engineering Journal, 2019 The evolution of semiconductor industry has brought in high current flow across the power rails (‘Vdd’ and ground) of digital integrated circuits (IC) encapsulated by the modern chip packages. This instigates the uncontrollable generation of Power Supply
Pritam Bhattacharjee +2 more
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Scheme features of radio pulse gating for radar measurements [PDF]
ITM Web of Conferences, 2019 The model of a radio pulse stroboscopic converter consisting of a mixer and a narrowband filter tuned to the difference frequency of the carrier signals is considered. We demonstrate that the measurement of the phase structure of the input signals can be
Zakharchenko Vladimir +1 more
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2.5 GHz Gated InGaAs/InP Single-Photon Avalanche Diode with 44 ps Time Jitter
Advanced Devices & Instrumentation, 2023 Gated single-photon avalanche diodes (SPADs) are practical solutions for quantum key distribution (QKD) applications. However, the gating frequency is limited by time jitter and afterpulse probability when SPADs operate at a frequency higher than 2 GHz ...
De-Yong He +8 more
doaj +1 more source
VLSI Synthesis for Low-Power Clocking in Synchronous Designs
Iraqi Journal of Industrial ResearchIn the field of information theory, the significance of low-power techniques cannot be overstated. Among these, clock gating stands out as a potent method to mitigate power dissipation in synchronous designs.
Naseer Alwan Hussein +2 more
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The role of ROC75 as a daytime component of the circadian oscillator in Chlamydomonas reinhardtii.
PLoS Genetics, 2020 The circadian clocks in chlorophyte algae have been studied in two model organisms, Chlamydomonas reinhardtii and Ostreococcus tauri. These studies revealed that the chlorophyte clocks include some genes that are homologous to those of the angiosperm ...
Takuya Matsuo +7 more
doaj +1 more source
Cell Reports, 2013 The subgranular zone (SGZ) of the adult hippocampus contains a pool of quiescent neural progenitor cells (QNPs) that are capable of entering the cell cycle and producing newborn neurons.
Pascale Bouchard-Cannon +4 more
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Abscisic Acid Machinery Is under Circadian Clock Regulation at Multiple Levels
Stresses, 2022 Abscisic acid (ABA) is recognized as the key hormonal regulator of plant stress physiology. This phytohormone is also involved in plant growth and development under normal conditions.
Gastón A. Pizzio
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On-Chip Transparent Wire Pipelining (invited paper) [PDF]
, 2004 Wire pipelining has been proposed as a viable mean to break the discrepancy between decreasing gate delays and increasing wire delays in deep-submicron technologies.
Casu, Mario Roberto, Macchiarulo, Luca
core +1 more source