Voltage over‐scaling CNT‐based 8‐bit multiplier by high‐efficient GDI‐based counters
IET Computers & Digital Techniques, 2023 A new low‐power and high‐speed multiplier is presented based on the voltage over scaling (VOS) technique and new 5:3 and 7:3 counter cells. The VOS reduces power consumption in digital circuits, but different voltage levels of the VOS increase the delay ...
Ayoub Sadeghi +4 more
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A CNTFET based process variation resilient SRAM design for stable low power and half select free operation [PDF]
Scientific ReportsStatic random-access memory (SRAM) design at nanoscale dimensions faces critical challenges arising from degraded stability, excessive power dissipation, and heightened sensitivity to process variations, particularly under low-voltage operation.
Shams Ul Haq +5 more
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Comprehensive performance analysis of CMOS and CNTFET based 8T SRAM cell
Journal of Electronic Science and TechnologyIn recent years, carbon nanotube field effect transistor (CNTFET) has become an attractive alternative to silicon for designing high-performance, highly stable, and low-power static random access memory (SRAM).
Mahamudul Hassan Fuad +4 more
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Advanced Materials InterfacesNanoplastics are persistent pollutants that may act as vectors of various inorganic and organic pollutants. Due to their small size and complex nature, their identification in environmental samples is still extremely difficult.
Giulia Elli +6 more
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Performance analysis of Ternary Adder and Ternary Multiplier without using Encoders and Decoders [PDF]
E3S Web of Conferences, 2023 This work presents comparison of ternary combinational digital circuits that reduce energy consumption in low-power VLSI (Very Large Scale Integration) design.
C. Venkataiah +6 more
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Implementation of N-inputs Ternary to Binary Converter with Multipart division technique Based on CNTFET [PDF]
AUT Journal of Electrical Engineering, 2023 In this paper, the new structure N×M (N-Ternary inputs and M-Binary outputs) Ternary to Binary Converter based on the Carbone Nanao Tube Field Effect Transistor is presented.
Mousa Yousefi, Khalil Monfaredi
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Performance evaluation of SRAM design using different field effect transistors [PDF]
E3S Web of Conferences, 2023 SRAM (Static Random Access Memory) is one of the type of memory which holds the data bit without periodic refreshment. Compared with DRAM (Dynamic Random Access Memory) which requires periodic refreshment of data bit stored in it.
C. Venkataiah +5 more
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Performance analysis of 4-bit ternary adder and multiplier using CNTFET for high speed arithmetic circuits [PDF]
E3S Web of Conferences, 2023 Multiple valued logic (MVL) can represent an exponentially higher number of data/information compared to the binary logic for the same number of logic bits.
C. Venkataiah +6 more
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A new tunneling carbon nanotube field effect transistor with linear doping profile at drain region: numerical simulation study [PDF]
مجله مدل سازی در مهندسی, 2018 For the first time, a new structure is proposed for tunneling CNTFET (T-CNTFET). In this new structure, the drain region is divided into two parts, and the part near the channel has a linear doping profile.
Behrooz Abdi Tahneh, Ali Naderi
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Design and implementation of CNTFET based ternary 1x1 memories [PDF]
, 2021 In this paper presented Design and implementation of CNTFET based Ternary 1x1 RAM memories high-performance digital circuits. CNTFET Ternary 1x1 SRAM memories is implement using 32nm technology process.
Sundararajan, M., Selvan, S.Tamil
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