Results 31 to 40 of about 1,394 (169)

Design and analysis of energy‐efficient compressors based on low‐power XOR gates in carbon nanotube technology

open access: yesIET Circuits, Devices and Systems, 2022
Compressors are the fundamental components in multipliers to accumulate and reduce partial product stages in a parallel manner. This study presents several architectures for low‐power 4‐2 and 5‐2 compressors, which are based on the proposed circuits of ...
Elmira Tavakkoli, Mahdi Aminian
doaj   +1 more source

CNTFET SPICE model: design of a carbon nanotube field effect transistor [PDF]

open access: yes, 2014
In this paper, we elucidate the development of SPICE model of Carbon Nanotube Field Effect Transistor (CNTFET) and analyze the performance of the proposed model.
S.M.A. Motakabber   +7 more
core   +1 more source

Design of CNTFET-based Electronic Circuits: A Review

open access: yes, 2023
In this review we present some design of CNTFET-based circuits, already proposed by us and here critically examined. For some of these, we compare the performance of proposed circuits both in CNTFET and CMOS technology. For CNTFET model, we use a compact,
Roberto Marani   +3 more
core   +1 more source

Comparative Analysis of CNTFET and CMOS Logic based Arithmetic Logic Unit [PDF]

open access: yesЖурнал нано- та електронної фізики, 2017
This paper proposes the novel low power and area efficient ALU (Arithmetic and Logic Unit) using adder and multiplexers. The adder and multiplexer are realized by using CNTFET (Carbon Nano Tube Field Effect Transistor) A verilog model of MOSFET (Metal ...
K.В Nehru   +2 more
doaj   +1 more source

Аналоговий мультиплікатор з використанням технології CNTFET

open access: yes, 2019
Зусилля, спрямовані на подолання проблем технологіїкомплементарної структури метал- оксиднапівпровідник(CMOS) зумовили створення польового транзистора на вуглецевих нанотрубках (CNTFET).
Seyedehsomayeh, Hatefinasab
core   +1 more source

Design and Characterization of Digital Gates based on CNTFET and CMOS Technology: A Review

open access: yes, 2022
In this paper we review a procedure to design and characterize logic gates based on CNTFET and CMOS technology. For the first technology we use a CNTFET model, already proposed by us, while for the second one we use the BSIM4 model of the Advanced Design
Roberto Marani   +3 more
core   +1 more source

Low power area efficient self-gated flip flop: Design, implementation and analysis in emerging devices

open access: yesEngineering and Applied Science Research, 2022
This study presents a novel CMOS self-gated flip flop for low power and area efficient applications. The low power operations are achieved by deactivating the clock signal when not required in the circuit.
Owais Ahmad Shah   +2 more
doaj  

NEGF-based transport phenomena for semiconduncting CNTFET

open access: yes, 2015
A transport phenomenon of carbon nanotube field effect transistor (CNTFET) is proposed in this paper. Non-Equilibrium Green's Function (NEGF) is used to design the proposed model. CNT chiral vector is straightly connected with CNTFET transport properties
Alam, A H M Zahirul   +7 more
core   +1 more source

An Innovative Approach to Multi‐Valued Logic

open access: yesIEEJ Transactions on Electrical and Electronic Engineering, EarlyView.
The current generation of computer systems operates on the principles of binary logic, which encompasses both logical and arithmetic operations. However, silicon technology has reached its peak performance, prompting researchers to explore alternative methods for enhancing computational efficiency. One such method is the adoption of Multi‐Valued Logic (
Ali Mokhtari, Peyman Kabiri
wiley   +1 more source

TWIN: Ternary Weight and Input Neural Network Accelerators Using an Experimentally Informed Ferroelectric Carbon Nanotube FET Compact Model

open access: yesAdvanced Electronic Materials, Volume 12, Issue 17, 7 September 2026.
Ferroelectric HZO thin films enable negative differential resistance in calibrated FeCNTFET models, creating stable ternary switching states for compact multi‐valued logic. The resulting device‐to‐architecture framework demonstrates efficient ternary neural‐network accelerators with substantial area and power savings, highlighting ferroelectric CNT ...
Mohammad Khaleqi Qaleh Jooq   +9 more
wiley   +1 more source

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