Results 31 to 40 of about 32,656 (190)
Error Correction Codes for Double Burst Errors Correction in Memories
This paper addresses the issue of double burst errors occurring in memories and presents the design of corresponding error correction codes (ECC). The proposed ECCs can correct up to two burst errors simultaneously, each up to 4-bit.
He Liu +4 more
doaj +1 more source
Continuous quantum error correction by cooling
We describe an implementation of quantum error correction that operates continuously in time and requires no active interventions such as measurements or gates. The mechanism for carrying away the entropy introduced by errors is a cooling procedure.
G. J. Milburn +4 more
core +1 more source
Ef3S: An evaluation framework for flash-based systems [PDF]
NAND Flash memories are gaining popularity in the development of electronic embedded systems for both consumer and mission-critical applications. NAND Flashes crucially influence computing systems development and performances. EF3S, a framework to easily
Di Carlo, Stefano +3 more
core +1 more source
In this study, the authors propose a new group testing based (GTB) error control codes (ECCs) approach for improving the reliability of memory structures in computing systems.
Lake Bu, M. Karpovsky, Michel A. Kinsy
semanticscholar +1 more source
A Number-Theoretic Error-Correcting Code
In this paper we describe a new error-correcting code (ECC) inspired by the Naccache-Stern cryptosystem. While by far less efficient than Turbo codes, the proposed ECC happens to be more efficient than some established ECCs for certain sets of parameters.
B Chevallier-Mames +11 more
core +1 more source
Two-Layer Error Control Codes Combining Rectangular and Hamming Product Codes for Cache Error [PDF]
We propose a novel two-layer error control code, combining error detection capability of rectangular codes and error correction capability of Hamming product codes in an efficient way, in order to increase cache error resilience for many core systems ...
Ampadu, Paul, Zhang, Meilin
core +2 more sources
Check-Bit Region Exploration in Two-Dimensional Error Correction Codes
The diversity of nanosatellite applications is increasingly attracting the scientific community’s attention. The main component of these satellites is the OnBoard Computer (OBC), which is responsible for all control and processing.
David C. C. Freitas +8 more
semanticscholar +1 more source
MBU is an increasing challenge in SRAM memory, due to the chip’s large area of SRAM, and supply power scaling applied to reduce static consumption.
Daniel Gil-Tomas +4 more
doaj +1 more source
ADAGE: An Automated Synthesis tool for Adaptive BCH-based ECC IP-Cores [PDF]
Bose-Chaudhuri-Hocquenghem (BCH) codes are a family of Error Correction Codes (ECCs) largely applied in modern Flash-based Hard Disks to significantly improve their endurance and reliability.
Di Carlo, Stefano +3 more
core
Abstract Muscle architecture is a major determinant of muscle performance and, in mammalian lineages, has been correlated with both feeding ecology and locomotor behaviors. Over the past decade, contrast‐enhanced micro‐CT (DiceCT) has emerged as an alternative to traditional dissection‐based measurement.
Aleksandra Ratkiewicz +5 more
wiley +1 more source

