Results 121 to 130 of about 2,524 (188)

Ershen Dan attenuates atherosclerosis by modulating the NOTCH1/NF-κB/NLRP3 signaling pathway to suppress M1 macrophage polarization. [PDF]

Chin Med
Zhao W, Wang H, Peng S, Wei Q, Zhang L, Li Y, Yang W.   +6 more
europepmc   +1 more source

Revisiting European social dialogue: A systematic literature review. [PDF]

Open Res Eur
Cárdenas Domínguez F, Fernández García M, Molinero Gerbeau Y.   +2 more
europepmc   +1 more source

Design and Simulation of a Portable Five-Lead ECG Monitoring Device With Adaptive Filtering for Continuous Remote Cardiac Assessment. [PDF]

Cureus
Rrmoku D.
europepmc   +1 more source

The Evolution of the Management of Dysplasia in Ulcerative Colitis. [PDF]

Cancers (Basel)
Vickers AL, Fichera A.
europepmc   +1 more source

Laparoscopic and endoscopic cooperative surgery in gastrointestinal tumors: current applications, oncologic considerations, and future directions. [PDF]

Front Oncol
Qiu C, Liu H.
europepmc   +1 more source

Holistic Treatment Incorporating Moist Wound Healing for Postoperative Radiation-Induced Perineal Ulcer in Rectal Malignancy: A Case Report. [PDF]

Case Rep Dermatol
Nie G, Zhang Y, Wu X, Luo Y, Song H, Li H, He Q, Wu Q, Chen R.   +8 more
europepmc   +1 more source

Studies on electrical safety, when using ESD protective equipment, especially ESD protective garments.

, 2005
openaire   +1 more source

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ESD buses for whole-chip ESD protection

ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349), 2003
A novel whole-chip ESD (electrostatic discharge) protection design with multiple ESD buses has been proposed to solve the ESD protection issue in the CMOS IC which has more separated power pins. The ESD current in the CMOS IC is diverted into the ESD buses, therefore the ESD current is conducted by the ESD buses away from the internal circuits and ...
Ming-Dou Ker, Hun-Hsien Chang, Tung-Yang Chen   +2 more
openaire   +1 more source

RFCMOS ESD protection and reliability

Proceedings of the 12th International Symposium on the Physical and Failure Analysis of Integrated Circuits, 2005. IPFA 2005., 2005
This paper addresses the ESD reliability issues in RFICs, focusing on the technology impact on the device and design. We also present the basic RF ESD protection methods used in industry. Presents the general topology of a 5 GHz LNA, which is protected using several ESD protection methodologies, and describes the 90 nm CMOS process technology used for ...
Natarajan, Mahadeva Iyer, Linten, Dimitri, Thijs, S., Jansen, Ph., Tremouilles, D., Jeamsaksiri, Wutthinan, Nakaie, T., Sawada, M., Hasebe, T., Decoutere, S., Groeseneken, G.   +10 more
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Modeling ESD protection

IEEE Potentials, 2005
This work presents the modeling and simulation of ESD circuit design protection. The electrostatic discharge (ESD) is a charge rebalancing process between two adjacent ICs. The ESD can cause IC failure during the manufacturing, the testing, the handling and the assembly of integrated circuits (ICs).
N. Mohan, A. Kumar
openaire   +1 more source