Results 31 to 40 of about 156,693 (147)

Evaluation of Bulk and SOI FeFET Architecture for Non-Volatile Memory Applications

IEEE Journal of the Electron Devices Society, 2019
The stress induced by the capping electrode is critical to stabilizing the ferroelectric phase in Si-doped HfO2 which is being actively explored for embedded non-volatile memory applications. While TiN is commonly used as the electrode of choice owing to
Antik Mallick, Nikhil Shukla
doaj   +1 more source

Correlation between the macroscopic ferroelectric material properties of Si:HfO2 and the statistics of 28nm FeFET memory arrays

, 2022
S.42-51With the discovery of ferroelectric hafnium oxide (FE-HfO2), the ferroelectric field effect transistor (FeFET), a long-term contender for non-volatile data storage, has finally managed to scale to the 2x nm technology node. Here for the first time,
Flachowsky, S., Mikolajick, T., Polakowski, P., Mueller, S., Paul, J., Slesazeck, S., Müller, J., Henker, S., Smith, E.   +8 more
core   +1 more source

Ferroelectric 2D SnS₂ Analog Synaptic FET. [PDF]

Adv Sci (Weinh)
In this study, the development and characterization of 2D ferroelectric field‐effect transistor (2D FeFET) devices are presented, utilizing nanoscale ferroelectric HfZrO2 (HZO) and 2D semiconductors.
Song CM, Kim D, Lee S, Kwon HJ.
europepmc   +2 more sources

Design and Simulation of Short Channel Si:HfO2 Ferroelectric Field Effect Transistor (FeFET) [PDF]

, 2014
Non-volatile memories using ferroelectric capacitors, known as Ferroelectric Random Access Memory (FRAM) have been studied for many years, but they suffer from loss of data during read out process.
Smaili, Idris H
core   +1 more source

A Multilevel FeFET Memory Device based on Laminated HSO and HZO Ferroelectric Layers for High-Density Storage

, 2022
S.665-668We report 1-3 bit/cell FeFET operation through optimized HSO and HZO ferroelectric laminate layers using alumina interlayers. Memory window up to 3.5V, switching speed of 300ns, 10 years retention, and 10 4 endurance are reported. The gate stack
Steinke, P., Polakowski, P., Zimmermann, K., Kämpfe, T., Pätzold, B., Mühle, U., Olivo, R., Czernohorsky, M., Ali, T., Hoffmann, R., Müller, F., Lederer, M., Seidel, K., Lehninger, D., Rudolph, M., Müller, J., Kühnel, K.   +16 more
core   +1 more source

Impact of Stack Structure Control and Ferroelectric Material Optimization in Novel Laminate HSO and HZO MFMIS FeFET

, 2022
8384We report ferroelectric (FE) laminate HSO/HZO MFMIS FeFETs. An MFM/MIS area ratio control enables low voltage operation and 105 endurance. FE lamination (2 × 10 nm, 4 × 5 nm) and low FE anneal reduce the FeFET variability. Impact of the stack (MFMIS),
Kühnel, Kati, Lehninger, David, Revello Olivo, Ricardo Orlando, Ali, Tarek Nadi Ismail, Schramm, Philipp, Müller, Franz, Kämpfe, Thomas, Rudolph, Matthias, Lederer, Maximilian, Hoffmann, Raik, Seidel, Konrad, Oehler, Sebastian, Czernohorsky, Malte, Mertens, K.   +13 more
core   +1 more source

Emerging Post‐CMOS Hardware Neurons for Brain‐Inspired Computing: Devices, Circuits, and System Integration

Advanced Functional Materials, EarlyView.
The physical realization of artificial neurons is a critical challenge for energy‐efficient neuromorphic computing. This review presents a comprehensive analysis of the evolution of artificial neuron implementations from conventional CMOS to emerging post‐CMOS technologies.
Kannan Udaya Mohanan, Hocheon Yoo, Benoît H. Lessard, Ioannis Kymissis, Chang‐Hyun Kim   +4 more
wiley   +1 more source

Neuromorphic Electronics for Intelligence Everywhere: Emerging Devices, Flexible Platforms, and Scalable System Architectures

Advanced Materials, EarlyView.
The perspective presents an integrated view of neuromorphic technologies, from device physics to real‐time applicability, while highlighting the necessity of full‐stack co‐optimization. By outlining practical hardware‐level strategies to exploit device behavior and mitigate non‐idealities, it shows pathways for building efficient, scalable, and ...
Kapil Bhardwaj, Roshni Satheesh Babu, Yuxin Xia, Eva Bestelink, Radu Sporea, Nikos Hastas, Ioannis Zeimpekis, Dimitra G. Georgiadou, Sayani Majumdar   +8 more
wiley   +1 more source

FeFET based Logic-in-Memory: an overview

, 2021
International audienceEmerging non-volatile memories are getting new interest in the system design community. They are used to design logic-in-memory circuits and propose alternatives to von-Neuman architectures.
Thomas Mikolajick, Ian O'Connor, Breyer, Evelyn, T, Cedric Marchand, Marchand, Cédric, Slesazeck, Stefan, O'Connor, Ian, Evelyn T. Breyer, Stefan Slesazeck, Mayeul Cantan, Cantan, Mayeul, Mikolajick, Thomas   +11 more
core   +1 more source

Disturb‐Resilient and Wake‐up‐Free 2T‐MFMFET Array for Storage and Computing Applications

Advanced Materials Technologies, EarlyView.
A disturb‐resilient and wake‐up‐free 2T‐MFMFET array fabricated using a FeRAM‐compatible process demonstrates excellent uniformity, a large memory window, and 3‐bit multi‐level‐cell storage capability. A newly proposed hybrid in‐memory computing scheme further enables accurate multiply–accumulate operations with minimal refresh overhead, highlighting ...
Chen‐Yi Cho, Ming‐Hung Wu, Yu‐De Lin, Po‐Chun Yeh, Kai Ni, Wen‐Yueh Jang, Tuo‐Hung Hou   +6 more
wiley   +1 more source