Results 41 to 50 of about 75,600 (123)

InSight: An FPGA-Based Neuromorphic Computing System for Deep Neural Networks

Journal of Low Power Electronics and Applications, 2020
Deep neural networks have demonstrated impressive results in various cognitive tasks such as object detection and image classification. This paper describes a neuromorphic computing system that is designed from the ground up for energy-efficient ...
Taeyang Hong, Yongshin Kang, Jaeyong Chung   +2 more
doaj   +1 more source

Digital model of TiO(2) memristor for field-programmable gate array

The Journal of Engineering, 2014
A digital model which imitates the behaviour of a TiO(2) memristor as a new block in Alter DSP Builder is proposed in this Letter. The proposed model can be used as an independent memristor unit working with other units for designing memristor circuits ...
Guangyi Wang, Dandan Bai, Xiaoyuan Wang
doaj   +1 more source

Corrigendum

Advances in Mechanical Engineering, 2016
CORRIGENDUM A hybrid swarm intelligence of artificial immune system tuned with Taguchi–genetic algorithm and its field-programmable gate array realization to optimal inverse kinematics for an articulated industrial robotic manipulator Owing to errors ...
doaj   +1 more source

Experimental Quantification of Hardware Requirements for FPGA-Based Reconfigurable PMUs

IEEE Access, 2019
Phasor Measurement Units (PMUs) are becoming intrinsic components of modern power systems. The synchrophasor estimation algorithms in PMUs pose stringent computational demands, which makes the application of Field Programmable Gate Arrays (FPGA) highly ...
Prottay M. Adhikari, Hossein Hooshyar, Luigi Vanfretti   +2 more
doaj   +1 more source

Ultrafast jet classification at the HL-LHC

Machine Learning: Science and Technology
Three machine learning models are used to perform jet origin classification. These models are optimized for deployment on a field-programmable gate array device.
Patrick Odagiu, Zhiqiang Que, Javier Duarte, Johannes Haller, Gregor Kasieczka, Artur Lobanov, Vladimir Loncar, Wayne Luk, Jennifer Ngadiuba, Maurizio Pierini, Philipp Rincke, Arpita Seksaria, Sioni Summers, Andre Sznajder, Alexander Tapper, Thea K Årrestad   +15 more
doaj   +1 more source

Implementation of Reed-Solomon Encoder/Decoder Using Field Programmable Gate Array

Journal of Engineering and Sustainable Development, 2006
In this paper, (15, 11) and (255, 239) Reed-Solomon codes have been designed and Implemented using ALTERA Field Programmable Gate Array (FPGA) device. The design is carried out by writing VHDL modules for different encoder and decoder components.
Hikmat N. Abdullah
doaj  

Impact of Parallel Gating on Gate Fidelities in Linear, Square, and Star Arrays of Noisy Flip-Flop Qubits [PDF]

Successfully implementing a quantum algorithm involves maintaining a low logical error rate by ensuring the validity of the quantum fault-tolerance theorem. The required number of physical qubits arranged in an array depends on the chosen Quantum Error Correction code and the achievable physical qubit error rate.
arxiv   +1 more source

Efficient Computations of Encodings for Quantum Error Correction [PDF]

, 1996
We show how, given any set of generators of the stabilizer of a quantum code, an efficient gate array that computes the codewords can be constructed. For an n-qubit code whose stabilizer has d generators, the resulting gate array consists of O(n d) operations, and converts k-qubit data (where k = n - d) into n-qubit codewords.
arxiv   +1 more source

SOTB Implementation of a Field Programmable Gate Array with Fine-Grained Vt Programmability

Journal of Low Power Electronics and Applications, 2014
Field programmable gate arrays (FPGAs) are one of the most widespread reconfigurable devices in which various functions can be implemented by storing circuit connection information and logic values into configuration memories.
Masakazu Hioki, Chao Ma, Takashi Kawanami, Yasuhiro Ogasahara, Tadashi Nakagawa, Toshihiro Sekigawa, Toshiyuki Tsutsumi, Hanpei Koike   +7 more
doaj   +1 more source

Automatic Qubit Characterization and Gate Optimization with QubiC [PDF]

arXiv, 2021
As the size and complexity of a quantum computer increases, quantum bit (qubit) characterization and gate optimization become complex and time-consuming tasks. Current calibration techniques require complicated and verbose measurements to tune up qubits and gates, which cannot easily expand to the large-scale quantum systems.
arxiv