Results 301 to 310 of about 47,640 (336)
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RSA Acceleration with Field Programmable Gate Arrays
1999An efficient implementations of modular exponentiation, i.e., the main building block in the RSA cryptographic scheme, is achieved by first designing a bit-level systolic array such that the whole procedure of modular exponentiation can be carried out entirely by a single unit without using global interconnections or memory to store intermediate ...
Alexander Tiountchik, Elena Trichina
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Reconfigurable processing with field programmable gate arrays
Proceedings of International Conference on Application Specific Systems, Architectures and Processors: ASAP '96, 2002In-system-programmable, SRAM-based Field Programmable Gate Arrays (FPGAs) can be used to create processors and coprocessors whose internal architecture as well as interconnections can be reconfigured to match the needs of a given application. Exploiting the inherent speed and parallelism of a hardware solution, FPGA-based coprocessors can execute ...
Bradly K. Fawcett, J. Watson
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Parallel placement for field-programmable gate arrays
Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field programmable gate arrays - FPGA '03, 2003Placement and routing are the most time-consuming processes in automatically synthesizing and configuring circuits for field-programmable gate arrays (FPGAs). In this paper, we use the negotiation-based paradigm to parallelize placement. Our new FPGA placer, NAP (Negotiated Analytical Placement), uses an analytical technique for coarse placement and ...
Pak K. Chan, Martine D. F. Schlag
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Field-Programmable Gate Arrays
2016Now comes the “hard” part. The next three chapters are all about hardware, which covers a wide gamut of topics like FPGA, SOPC, LCD, etc. This chapter begins with an overview of the embedded hardware in general, followed by detailed discussions about FPGA and IP protection.
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FIR filters with field-programmable gate arrays
Journal of VLSI signal processing systems for signal, image and video technology, 1993Distributed arithmetic techniques are the key to efficient implementation of DSP algorithms in FPGAs. The distributed arithmetic process is briefly described. A representative DSP design application in the form of an 8 tap FIR filter is offered for the Xilinx XC3042 field programmable logic array (FPGA).
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A Shogi Processor with a Field Programmable Gate Array
2001In this paper we describe the architecture of a shogi processor based on reconfigurable hardware. For our implementation, we have used Field Programmable Gate Arrays (FPGAs), which can be reconfigured dynamically by downloading configuration data from host computers.
Yohei Hori +4 more
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Regular Datapaths on Field-Programmable Gate Arrays
1997Field-Programmable Gate Arrays (FPGAs) are a recent kind of programmable logic device. They allow the implementation of integrated digital electronic circuits without requiring the complex optical, chemical and mechanical processes used in a conventional chip fabrication.
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Field programmable gate array (FPGA) circuits
1996Field programmable gate arrays (FPGA) are a recently developed family of programmable circuits. Like mask programmable gate arrays (MPGA), FPGAs implement thousands of logic gates. But, unlike MPGAs, a user can program an FPGA design as traditional programmable logic devices (PLDs): in-site and a in a few seconds.
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Educational use of Field Programmable Gate Arrays
1994Traditionally, digital logic designs in undergraduate courses are described on paper and implemented with TTL SSI/MSI components. These standard logic devices have proven to be an inexpensive approach, but require “wirewrapping” and other similar means of circuit board assembly; as a result, a significant portion of the students' effort is focused on ...
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