Results 11 to 20 of about 46,893 (234)

Hardware acceleration of number theoretic transform for zk‐SNARK

open access: yesEngineering Reports, EarlyView., 2023
An FPGA‐based hardware accelerator with a multi‐level pipeline is designed to support the large‐bitwidth and large‐scale NTT tasks in zk‐SNARK. It can be flexibly scaled to different scales of FPGAs and has been equipped in the heterogeneous acceleration system with the help of HLS and OpenCL.
Haixu Zhao   +6 more
wiley   +1 more source

A binary self-organizing map and its FPGA implementation [PDF]

open access: yes, 2009
A binary Self Organizing Map (SOM) has been designed and implemented on a Field Programmable Gate Array (FPGA) chip. A novel learning algorithm which takes binary inputs and maintains tri-state weights is presented.
Appiah, Kofi   +7 more
core   +1 more source

Design of a novel multi-channel general signal processing platform

open access: yesDianzi Jishu Yingyong, 2019
This paper presented the design of a novel general signal processing system based on the partial reconfiguration of Field Programmable Gate Array(FPGA). This solution uses framework of high speed FPGA,Digital Signal Processor(DSP) and Analog/Digital ...
Zheng Baiheng   +3 more
doaj   +1 more source

FPGA Implementation of Spectral Subtraction for In-Car Speech Enhancement and Recognition [PDF]

open access: yes, 2008
The use of speech recognition in noisy environments requires the use of speech enhancement algorithms in order to improve recognition performance. Deploying these enhancement techniques requires significant engineering to ensure algorithms are realisable
Deo, Kapeel   +3 more
core   +2 more sources

Robust Direct Torque Control with Super-Twisting Sliding Mode Control for an Induction Motor Drive

open access: yesComplexity, 2019
A field-programmable gate array- (FPGA-) based nonlinear Direct Torque Control (DTC) associated with Space Vector Modulation (SVM), Input-Output Feedback Linearization (IOFL), and second-order super-twisting speed controller is proposed to control an ...
Saber Krim   +2 more
doaj   +1 more source

Implemetasi Komputasi Akar Kuadrat Resolusi Tinggi pada Field Programmable Gate Array (FPGA)

open access: yesJurnal Teknologi Informasi dan Ilmu Komputer, 2022
Komputasi akar kuadrat diperlukan pada beberapa proses pengendalian, diantaranya untuk Direct Torque Control (DTC) pada sistem penggerak motor yang membutuhkan proses perhitungan yang sangat cepat.
Muhammad Irfan, Hendra Setiawan
doaj   +1 more source

Harmonic elimination of a fifteen‐level inverter with reduced number of switches using genetic algorithm

open access: yesIET Power Electronics, EarlyView., 2023
This article presents a Fifteen‐level inverter topology that has a lesser number of switches (12) and can accommodate isolated DC sources. The total harmonic elimination (THD) of the proposed topology using genetic algorithm is within the IEEE 519 standards. Further, the fifteen‐level inverter is implemented in Hardware and firing pulses were generated
Yogesh Joshi   +4 more
wiley   +1 more source

A Portable Laser Photoacoustic Methane Sensor Based on FPGA

open access: yesSensors, 2016
A portable laser photoacoustic sensor for methane (CH4) detection based on a field-programmable gate array (FPGA) is reported. A tunable distributed feedback (DFB) diode laser in the 1654 nm wavelength range is used as an excitation source.
Jianwei Wang, Huili Wang, Xianyong Liu
doaj   +1 more source

Statistical lossless compression of space imagery and general data in a reconfigurable architecture [PDF]

open access: yes, 2008
This paper investigates an universal algorithm and hardware architecture for context-based statistical lossless compression of multiple types of data using FPGA (Field Programmable Gate Array) devices which support partial and dynamic reconfiguration ...
Canagarajah, CN   +3 more
core   +2 more sources

Parallel Fixed Point Implementation of a Radial Basis Function Network in an FPGA

open access: yesSensors, 2014
This paper proposes a parallel fixed point radial basis function (RBF) artificial neural network (ANN), implemented in a field programmable gate array (FPGA) trained online with a least mean square (LMS) algorithm.
Alisson C. D. de Souza   +1 more
doaj   +1 more source

Home - About - Disclaimer - Privacy