Adaptive Bitline Voltage Countermeasure for Neighbor Wordline Interference in 3D NAND Flash Memory-Based Sensors. [PDF]
Fan H +6 more
europepmc +1 more source
Challenges to Optimize Charge Trapping Non-Volatile Flash Memory Cells: A Case Study of HfO2/Al2O3 Nanolaminated Stacks. [PDF]
Spassov D, Paskaleva A.
europepmc +1 more source
ES-SNN: e-Flash Memory-Based Stochastic Spiking Neural Networks for Edge Inference
In this work, we propose an e-Flash memory-based Stochastic Spiking Neural Network (ES-SNN), which integrates stochastic spiking neurons with e-Flash memory-based multi-level synapses for probabilistic computation.
Hyeyeon Jeon +3 more
doaj +1 more source
An epidermal electronic system for physiological information acquisition, processing, and storage with an integrated flash memory array. [PDF]
Xiang L +12 more
europepmc +1 more source
Physical and Electrical Analysis of Poly-Si Channel Effect on SONOS Flash Memory. [PDF]
Jeong JK +5 more
europepmc +1 more source
Dielectric Engineering to Suppress Cell-to-Cell Programming Voltage Interference in 3D NAND Flash Memory. [PDF]
Jung WJ, Park JY.
europepmc +1 more source
Novel Program Scheme of Vertical NAND Flash Memory for Reduction of Z-Interference. [PDF]
Yi SI, Kim J.
europepmc +1 more source
High-Performance Non-Volatile InGaZnO Based Flash Memory Device Embedded with a Monolayer Au Nanoparticles. [PDF]
Naqi M +8 more
europepmc +1 more source
CMOS-compatible ferroelectric NAND flash memory for high-density, low-power, and high-speed three-dimensional memory. [PDF]
Kim MK, Kim IJ, Lee JS.
europepmc +1 more source
Channel Coding for Flash Memories.
Flash memories are non-volatile memory devices. The rapid development of flash technologies leads to higher storage density, but also to higher error rates. This dissertation considers this reliability problem of flash memories and investigates suitable error correction codes, e.g. BCH-codes and concatenated codes.
openaire +3 more sources

