Results 21 to 30 of about 85,934 (320)

Optimal inverter logic gate using 10-nm double gate-all-around (DGAA) transistor with asymmetric channel width [PDF]

AIP Advances, 2016
We investigate the electrical characteristics of a double-gate-all-around (DGAA) transistor with an asymmetric channel width using three-dimensional device simulation.
Myunghwan Ryu, Franklin Bien, Youngmin Kim   +2 more
doaj   +3 more sources

Surface-Potential-Based Drain Current Model of Gate-All-Around Tunneling FETs

IEEE Journal of the Electron Devices Society
A closed-form, analytical, and unified model for the surface potential from source to drain in nanowire (NW) gate-all-around (GAA) tunneling field effect transistors (TFETs) is proposed and validated.
Zhanhang Chen, Haoliang Shan, Ziyi Ding, Xia Wu, Xiaolin Cen, Xiaoyu Ma, Wanling Deng, Junkai Huang   +7 more
doaj   +2 more sources

Externally Assembled Gate-All-Around Carbon Nanotube Field-Effect Transistor

IEEE Electron Device Letters, 2008
In this letter, we demonstrate a gate-all-around single-wall carbon nanotube field-effect transistor. This is the first successful experimental implementation of an off-chip gate and gate-dielectric assembly with subsequent deposition on a suitable substrate. The fabrication process and device measurements are discussed in the letter.
Chen, Zhihong, Farmer, Damon, Xu, Sheng, Gordon, Roy, Avouris, Phaedon, Appenzeller, Joerg   +5 more
openaire   +5 more sources

Design and performance analysis of a vertically stacked gate-all-around nanosheet FET with embedded nanocavity for biosensing applications. [PDF]

Sci Rep
Prasanna RL, Karumuri SR, Sreenivasulu VB, Kondaveeti GS.   +3 more
europepmc   +3 more sources

Design of a gate-all-around arch-shaped tunnel-field-effect-transistor-based capacitorless DRAM. [PDF]

Discov Nano
Bae SJ, Lee SH, Park J, Kim MS, Hong JW, Koh WS, Yun GS, Jang J, Bae JH, Kang IM.   +9 more
europepmc   +3 more sources

Erratum: “Gate electrostatic controllability enhancement in nanotube gate all around field effect transistor” [AIP Adv. 13, 065006 (2023)] [PDF]

AIP Advances, 2023
Laixiang Qin, Chunlai Li, Yiqun Wei, Ziang Xie, Jin He   +4 more
doaj   +2 more sources

Nanodevices Tend to Be Round

Micromachines, 2021
Under several circumstances, a nanowire transistor with a square cross-section behaves as a circular. Taking the Gate-All-Around junctionless transistor as a primary example, we investigate the transition of the conductive region from square to circle ...
Georges Pananakakis, Gérard Ghibaudo, Sorin Cristoloveanu   +2 more
doaj   +1 more source

Sub-10 nm Top Width Nanowire InGaAs Gate-All-Around MOSFETs With Improved Subthreshold Characteristics and Device Reliability

IEEE Journal of the Electron Devices Society, 2022
In this article, sub-10 nm top width nanowire In0.53Ga0.47As gate-all-around (GAA) MOSFETs with improved subthreshold characteristics and reliability are demonstrated.
Hua-Lun Ko, Quang Ho Luc, Ping Huang, Jing-Yuan Wu, Si-Meng Chen, Nhan-Ai Tran, Heng-Tung Hsu, Edward Yi Chang   +7 more
doaj   +1 more source

Investigation on Ge_0.8Si_0.2-Selective Atomic Layer Wet-Etching of Ge for Vertical Gate-All-Around Nanodevice. [PDF]

Nanomaterials (Basel), 2021
Xie L, Zhu H, Zhang Y, Ai X, Li J, Wang G, Du A, Kong Z, Wang Q, Lu S, Li C, Li Y, Huang W, Radamson HH.   +13 more
europepmc   +3 more sources

A Vertically Stacked Nanosheet Gate-All-Around FET for Biosensing Application

IEEE Access, 2021
In this paper, a vertically stacked nanosheet gate-all-around field-effect transistor (GAA-NSFET) as a label-free biosensor has been proposed and investigated.
Cong Li, Feichen Liu, Ru Han, Yiqi Zhuang   +3 more
doaj   +1 more source