Aharonov-Bohm oscillations and electron gas transitions in hexagonal core-shell nanowires with an axial magnetic field [PDF]
, 2015 We use spin-density-functional theory within an envelope function approach to calculate electronic states in a GaAs/InAs core-shell nanowire pierced by an axial magnetic field.
Bertoni, Andrea +4 more
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IEEE Access, 2021 To estimate characteristic fluctuation of emerging devices, three-dimensional device simulation has been performed intensively for various random cases; however, it strongly relies on huge computational resources.
Wen-Li Sung, Yiming Li
doaj +1 more source
Fast and Efficient Light Intensity Modulation in SOI with Gate-All-Around Transistor Phase Modulator [PDF]
, 2005 We report fast modulation (>30 GHz) in a SOI resonant cavity using integrated Bragg mirrors and a gate-all-around transistor as active element.
Dainesi, P. +3 more
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Experimental and Simulation Study of a High Current 1D Silicon Nanowire Transistor Using Heavily Doped Channels [PDF]
, 2016 Silicon nanowires have numerous potential applications, including transistors, memories, photovoltaics, biosensors and qubits [1]. Fabricating a nanowire with the required characteristics for a specific application, however, poses some challenges.
Amoroso, Salvatore M. +9 more
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National Science Open, 2022 Non-destructive stress characterization is essential for gate-all-around (GAA) nanosheet (NS) transistors technology, while it is a big challenge to be realized on nanometer-sized GAA devices by using traditional Micro-Raman spectroscopy due to its light
Huang Ziqiang +10 more
doaj +1 more source
Variability Study of High Current Junctionless Silicon Nanowire Transistors [PDF]
, 2018 Silicon nanowires have numerous potential applications, including transistors, memories, photovoltaics, biosensors and qubits [1]. Fabricating a nanowire with characteristics required for a specific application, however, poses some challenges.
Adamu-Lema, Fikru +6 more
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An Analytical Gate-All-Around MOSFET Model for Circuit Simulation
Advances in Materials Science and Engineering, 2015 A generic charge-based compact model for undoped (lightly doped) quadruple-gate (QG) and cylindrical-gate MOSFETs using Verilog-A is developed. This model is based on the exact solution of Poisson’s equation with scale length.
Kuan-Chou Lin +2 more
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Effects of Etching Variations on Ge/Si Channel Formation and Device Performance
Nanoscale Research Letters, 2018 During the formation of Ge fin structures on a silicon-on-insulator (SOI) substrate, we found that the dry etching process must be carefully controlled. Otherwise, it may lead to Ge over-etching or the formation of an undesirable Ge fin profile.
Jiann-Lin Chen +2 more
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Impact of precisely positioned dopants on the performance of an ultimate silicon nanowire transistor: a full three-dimensional NEGF simulation study [PDF]
, 2013 In this paper, we report the first systematic study of quantum transport simulation of the impact of precisely positioned dopants on the performance of ultimately scaled gate-all-around silicon nanowire transistors (NWTs) designed for digital circuit ...
Asenov, A., Georgiev, V.P., Towie, E.A.
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III-V Gate-all-around Nanowire MOSFET Process Technology: From 3D to 4D
, 2012 In this paper, we have experimentally demonstrated, for the first time, III-V 4D transistors with vertically stacked InGaAs nanowire (NW) channels and gate-all-around (GAA) architecture.
Gordon, R. G. +6 more
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