Results 111 to 120 of about 2,685 (171)
Evolutionary Memory: Unified Random Access Memory (URAM) [PDF]
, 2010 Jin-Woo, Han, Yang-Kyu, Choi
core +2 more sources
Reduction of CMOS Image Sensor Read Noise to Enable Photon Counting. [PDF]
Sensors (Basel), 2016 Guidash M, Ma J, Vogelsang T, Endsley J.
europepmc +1 more source
CMOS Scaling for the 5 nm Node and Beyond: Device, Process and Technology. [PDF]
Nanomaterials (Basel)Radamson HH +30 more
europepmc +1 more source
Modeling Leakage in Sub-Micron CMOS Technologies [PDF]
, 2004 Mortazavi, Behnaz, Mortazavi, Behnaz
core
Energy-balance modeling of short channel single-GB thin film transistors
, 2005 Mizuta, Hiroshi, Walker, P.
core
Chōteidenryoku daikibo shūseki kairo no tame no denryoku kōritsu no takai kiban baiasu seigyo [PDF]
Okuhara, Hayate +2 more
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IEEE Transactions on Electron Devices, 2022
The shape of the channel cross section in rectangular nanowire (NW) gate-all-around (GAA) MOSFETs turns trapezoidal due to process variations. In this article, the impact of process-induced inclination of sidewalls on gate-induced drain leakage (GIDL ...
Ashraf Maniyar +3 more
openaire +2 more sources
The shape of the channel cross section in rectangular nanowire (NW) gate-all-around (GAA) MOSFETs turns trapezoidal due to process variations. In this article, the impact of process-induced inclination of sidewalls on gate-induced drain leakage (GIDL ...
Ashraf Maniyar +3 more
openaire +2 more sources
Indian Journal of Physics, 2020
In this paper, an analytical paradigm for the gate-induced drain leakage (GIDL) for shallow extension engineered dual metal surrounding gate (SEE-DM-SG) MOSFET using superposition technique with appropriate boundary conditions is proposed. Electric field, Ez, gate-induced drain leakage current, IGIDL, and surface potential have been modeled.
Anubha Goel +3 more
semanticscholar +3 more sources
In this paper, an analytical paradigm for the gate-induced drain leakage (GIDL) for shallow extension engineered dual metal surrounding gate (SEE-DM-SG) MOSFET using superposition technique with appropriate boundary conditions is proposed. Electric field, Ez, gate-induced drain leakage current, IGIDL, and surface potential have been modeled.
Anubha Goel +3 more
semanticscholar +3 more sources