Results 131 to 140 of about 3,848,811 (155)
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Simulation of amplified gate-induced-drain-leakage (GIDL) in short-channel SOI MOSFETs
Proceedings of International Workshop on Numerical Modeling of processes and Devices for Integrated Circuits: NUPAD V, 2002Amplification of gate-induced-drain-leakage current has been reported for short channel MOS-transistors on SOI substrate. Here, we show that this effect is reproduced consistently by 2D-device simulation when a band-to-band tunneling model is included.
A. von Schwerin, W. Bergner, K. Jacobs
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2008 IEEE Silicon Nanoelectronics Workshop, 2008
A capacitor-less one-transistor DRAM cell with surrounding gate MOSFET with vertical channel (SGVC) using gate-induced drain leakage (GIDL) current for write operation was demonstrated. Compared with the conventional write operation with impact ionization current, the write operation with GIDL current provides high sensing margin owing to higher ...
Han Ki Chung +9 more
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A capacitor-less one-transistor DRAM cell with surrounding gate MOSFET with vertical channel (SGVC) using gate-induced drain leakage (GIDL) current for write operation was demonstrated. Compared with the conventional write operation with impact ionization current, the write operation with GIDL current provides high sensing margin owing to higher ...
Han Ki Chung +9 more
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Microsystem Technologies, 2017
In this paper a cylindrical Dual Metal (DM) Dielectric Engineered (DE) Gate All Around (GAA) MOSFET has been proposed to resolve a big issue of Gate Inducted Drain leakage (GIDL) current in cylindrical Gate All Around (GAA) MOSFET to enhance the device reliability. Dual Metal Dielectric Engineered Gate All Around (DMDEGAA) MOSFET has been compared with
Sonam Rewari +4 more
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In this paper a cylindrical Dual Metal (DM) Dielectric Engineered (DE) Gate All Around (GAA) MOSFET has been proposed to resolve a big issue of Gate Inducted Drain leakage (GIDL) current in cylindrical Gate All Around (GAA) MOSFET to enhance the device reliability. Dual Metal Dielectric Engineered Gate All Around (DMDEGAA) MOSFET has been compared with
Sonam Rewari +4 more
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IEEE Transactions on Electron Devices, 2000
Gate induced drain leakage (GIDL) is frequently described by band-to-band tunneling. This mechanism is insensitive to temperature and occurs only under strong electric fields. Under the condition of small electric fields, however, GIDL exhibits a strong dependence on temperature, which is due to trap-assisted generation of electron hole pairs.
M. Rosar, B. Leroy, G. Schweeger
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Gate induced drain leakage (GIDL) is frequently described by band-to-band tunneling. This mechanism is insensitive to temperature and occurs only under strong electric fields. Under the condition of small electric fields, however, GIDL exhibits a strong dependence on temperature, which is due to trap-assisted generation of electron hole pairs.
M. Rosar, B. Leroy, G. Schweeger
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IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest., 2005
We demonstrate that for aggressively scaled FinFETs, with 2nm HfO 2 and TiN metal gate (i.e., workfunction close to midgap), several parasitic leakage mechanisms that impact the off-state current become dominant. We provide a detailed characterization of these mechanisms as well as design guidelines for eliminating them by careful junction dopant ...
T. Hoffmann +12 more
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We demonstrate that for aggressively scaled FinFETs, with 2nm HfO 2 and TiN metal gate (i.e., workfunction close to midgap), several parasitic leakage mechanisms that impact the off-state current become dominant. We provide a detailed characterization of these mechanisms as well as design guidelines for eliminating them by careful junction dopant ...
T. Hoffmann +12 more
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Solid-State Electronics, 2009
Recently, minimizing the standby power is considered as a critical issue in high-density, mobile CMOS technology. One of the major sources of the leakage current in off-state of ultra-small MOSFET is gate-induced drain leakage (GIDL) which is mainly composed of inter-band and trap-assisted tunneling.
null Seongjae Cho +5 more
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Recently, minimizing the standby power is considered as a critical issue in high-density, mobile CMOS technology. One of the major sources of the leakage current in off-state of ultra-small MOSFET is gate-induced drain leakage (GIDL) which is mainly composed of inter-band and trap-assisted tunneling.
null Seongjae Cho +5 more
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Japanese Journal of Applied Physics, 2003
Gate-induced drain leakage (GIDL) current is investigated in single-gate (SG) ultra-thin body field effect transistor (FET), symmetrical double-gate (DG) FinFET, and asymmetrical DG metal oxide semiconductor field effect transistor (MOSFET) devices. Measured reductions in GIDL current for SG and DG thin-body devices are reported for the first time. The
Choi, YK Choi, Yang-Kyu +3 more
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Gate-induced drain leakage (GIDL) current is investigated in single-gate (SG) ultra-thin body field effect transistor (FET), symmetrical double-gate (DG) FinFET, and asymmetrical DG metal oxide semiconductor field effect transistor (MOSFET) devices. Measured reductions in GIDL current for SG and DG thin-body devices are reported for the first time. The
Choi, YK Choi, Yang-Kyu +3 more
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2017 Devices for Integrated Circuit (DevIC), 2017
In this paper a Dual Metal Insulated Shallow Extension Gate All Around (DMISEGAA) MOSFET has been proposed to solve a big issue of Gate Inducted Drain leakage (GIDL) current in cylindrical Gate All Around (GAA) MOSFET for improved analog performance. DMISEGAA MOSFET improves gate leakages by minimizing the tunneling from Valence Band to Conduction Band
Sonam Rewari +4 more
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In this paper a Dual Metal Insulated Shallow Extension Gate All Around (DMISEGAA) MOSFET has been proposed to solve a big issue of Gate Inducted Drain leakage (GIDL) current in cylindrical Gate All Around (GAA) MOSFET for improved analog performance. DMISEGAA MOSFET improves gate leakages by minimizing the tunneling from Valence Band to Conduction Band
Sonam Rewari +4 more
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IEEE International Electron Devices Meeting 2003, 2004
A capacitorless 1T DRAM cell using gate-induced drain leakage (GIRL) current for write operation was demonstrated for the first time. Compared with the conventional write operation with impact ionization current, write operation with GIDL current provides low-power and high-speed operation. The capacitorless 1T-DRAM is the most promising technology for
E. Yoshida, T. Tanaka
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A capacitorless 1T DRAM cell using gate-induced drain leakage (GIRL) current for write operation was demonstrated for the first time. Compared with the conventional write operation with impact ionization current, write operation with GIDL current provides low-power and high-speed operation. The capacitorless 1T-DRAM is the most promising technology for
E. Yoshida, T. Tanaka
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IEEE Electron Device Letters, 1992
An off-state leakage current unique for short-channel SOI MOSFETs is reported. This off-state leakage is the amplification of gate-induced-drain-leakage current by the lateral bipolar transistor in an SOI device due to the floating body. The leakage current can be enhanced by as much as 100 times for 1/4 mu m SOI devices.
J. Chen, F. Assaderaghi, P.-K. Ko, C. Hu
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An off-state leakage current unique for short-channel SOI MOSFETs is reported. This off-state leakage is the amplification of gate-induced-drain-leakage current by the lateral bipolar transistor in an SOI device due to the floating body. The leakage current can be enhanced by as much as 100 times for 1/4 mu m SOI devices.
J. Chen, F. Assaderaghi, P.-K. Ko, C. Hu
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