High performance Si-MoS2 heterogeneous embedded DRAM. [PDF]
Xiao K +12 more
europepmc +1 more source
Memory characteristics of silicon nanowire transistors generated by weak impact ionization. [PDF]
Lim D, Kim M, Kim Y, Kim S.
europepmc +1 more source
All WSe2 1T1R resistive RAM cell for future monolithic 3D embedded memory integration. [PDF]
Sivan M +10 more
europepmc +1 more source
A Constant Energy-Per-Cycle Ring Oscillator Over a Wide Frequency Range for Wireless Sensor Nodes. [PDF]
Lee I, Sylvester D, Blaauw D.
europepmc +1 more source
High Performance and Low power Monolithic Three-Dimensional Sub-50 nm Poly Si Thin film transistor (TFTs) Circuits. [PDF]
Wu TT +14 more
europepmc +1 more source
Recent Progress of Ferroelectric-Gate Field-Effect Transistors and Applications to Nonvolatile Logic and FeNAND Flash Memory. [PDF]
Sakai S, Takahashi M.
europepmc +1 more source
Reduction of CMOS Image Sensor Read Noise to Enable Photon Counting. [PDF]
Guidash M, Ma J, Vogelsang T, Endsley J.
europepmc +1 more source
CMOS Scaling for the 5 nm Node and Beyond: Device, Process and Technology. [PDF]
Radamson HH +30 more
europepmc +1 more source
A soft-programming-free operation method in unified RAM (URAM) is presented. An oxide/nitride/oxide (O/N/O) layer and a floating-body are integrated in a FinFET, thereby providing the versatile functions of a high-speed capacitorless 1T-DRAM, as well as nonvolatile memory, and the mode of the memory cell can be selected and independently utilized ...
Yang-Kyu Choi +2 more
exaly +4 more sources
Related searches:
Gate-induced drain leakage (GIDL) in MFMIS and MFIS negative capacitance FinFETs
Current Applied Physics, 2020Abstract The gate induced drain leakage (GIDL) effect in negative capacitance (NC) FinFET is investigated. A Landau–Ginzburg–Devonshire equation (which considers the polarization gradient in ferroelectric material) is used to estimate the characteristics of the NC FinFET.
Changhwan Shin, Gihun Choe
exaly +2 more sources

