Results 111 to 120 of about 3,848,811 (155)

High performance Si-MoS2 heterogeneous embedded DRAM. [PDF]

open access: yesNat Commun
Xiao K   +12 more
europepmc   +1 more source

All WSe2 1T1R resistive RAM cell for future monolithic 3D embedded memory integration. [PDF]

open access: yesNat Commun, 2019
Sivan M   +10 more
europepmc   +1 more source

High Performance and Low power Monolithic Three-Dimensional Sub-50 nm Poly Si Thin film transistor (TFTs) Circuits. [PDF]

open access: yesSci Rep, 2017
Wu TT   +14 more
europepmc   +1 more source

Reduction of CMOS Image Sensor Read Noise to Enable Photon Counting. [PDF]

open access: yesSensors (Basel), 2016
Guidash M, Ma J, Vogelsang T, Endsley J.
europepmc   +1 more source

CMOS Scaling for the 5 nm Node and Beyond: Device, Process and Technology. [PDF]

open access: yesNanomaterials (Basel)
Radamson HH   +30 more
europepmc   +1 more source

Gate-Induced Drain-Leakage (GIDL) Programming Method for Soft-Programming-Free Operation in Unified RAM (URAM)

open access: yesIEEE Electron Device Letters, 2009
A soft-programming-free operation method in unified RAM (URAM) is presented. An oxide/nitride/oxide (O/N/O) layer and a floating-body are integrated in a FinFET, thereby providing the versatile functions of a high-speed capacitorless 1T-DRAM, as well as nonvolatile memory, and the mode of the memory cell can be selected and independently utilized ...
Yang-Kyu Choi   +2 more
exaly   +4 more sources

Gate-induced drain leakage (GIDL) in MFMIS and MFIS negative capacitance FinFETs

Current Applied Physics, 2020
Abstract The gate induced drain leakage (GIDL) effect in negative capacitance (NC) FinFET is investigated. A Landau–Ginzburg–Devonshire equation (which considers the polarization gradient in ferroelectric material) is used to estimate the characteristics of the NC FinFET.
Changhwan Shin, Gihun Choe
exaly   +2 more sources

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