Development and Evaluation of SiC LDMOS for High-Temperature Applications
IEEE Journal of the Electron Devices SocietyThis paper proposes and experimentally evaluates SiC laterally diffused metal-oxide-semiconductor (LDMOS) devices fabricated on two full 4H-SiC processes with P-type and N-type epitaxial layers.
Pengyu Lai +3 more
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The Simulation Study of the SOI Trench LDMOS With Lateral Super Junction
IEEE Journal of the Electron Devices Society, 2018 A novel lateral double diffused metal oxide semiconductor (LDMOS) with trench oxide layer, featuring a lateral super junction structure based on the silicon-on-insulator technology is proposed.
Weizhong Chen +3 more
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Transient Non-linear Thermal FEM Simulation of Smart Power Switches and Verification by Measurements [PDF]
, 2007 Thermal FEM (Finite Element Method) simulations can be used to predict the thermal behavior of power semiconductors in application. Most power semiconductors are made of silicon. Silicon thermal material properties are significantly temperature dependent.
Glavanovics, M., Kosel, V., Sleik, R.
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On the modeling of LDMOS RF power transistors
IEEE Custom Integrated Circuits Conference 2010, 2010 In this review we present a technology-independent approach to the construction of a circuit model for a high-power radio-frequency (RF) LDMOS FET. We compare and contrast this approach with other MOSFET modeling approaches used for digital and RF CMOS applications.
Wood, J, Aaen, PH
openaire +3 more sources
4H-SiC LDMOS Integrating a Trench MOS Channel Diode for Improved Reverse Recovery Performance. [PDF]
Micromachines (Basel), 2023 Liu Y, Jia D, Fang J.
europepmc +1 more source
High Efficiency Power Amplifier Based on Envelope Elimination and Restoration Technique [PDF]
, 2010 Due to complex envelope and phase modulation employed in modern transmitters it is necessary to use power amplifiers that have high linearity. Linear power amplifiers (classes A, B and AB) are commonly used, but they suffer from low efficiency especially
Alou Cervera, Pedro +9 more
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Interaction Between Hot Carrier Aging and PBTI Degradation in nMOSFETs: Characterization, Modelling and Lifetime Prediction [PDF]
, 2017 Modelling of the interaction between Hot Carrier Aging (HCA) and Positive Bias Temperature Instability (PBTI) has been considered as one of the main challenges in nanoscale CMOS circuit design.
Adamu-Lema, F. +14 more
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Gate Engineering in SOI LDMOS for Device Reliability
MATEC Web of Conferences, 2016 A linearly graded doping drift region with step gate structure, used for improvement of reduced surface field (RESURF) SOI LDMOS transistor performance has been simulated with 0.35µm technology in this paper.
Aanand +5 more
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Procedimiento De Amplificador De Envolvente De Señales Moduladas En RF Para Técnicas EER Y ET [PDF]
, 2011 An envelope amplifier for an EER (Envelope Elimination and Restoration) and ET (Envelope Tracking) techniques is shown in this paper. The amplifier is based on a high speed two phases buck converter and employs RF LDMOS technology for the switching ...
Benavente Peces, César +4 more
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Table 1. Typical performance RF performance at Tcase = 25 �C in a class-AB production test circuit. Mode of operation f VDS PL(AV) Gp �D ACPR885k ACPR1980k [PDF]
[1] Single carrier N-CDMA with pilot, paging sync and 6 traffic channels (Walsh codes 8- 13). PAR = 9.7 dB at 0.01 % probability on CCDF. Channel bandwidth is 1.23 MHz. [2] Measured within 30 kHz bandwidth.
Wimax Power Ldmos Transistor
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