Results 81 to 90 of about 2,599 (207)

A Single-Event Burnout Hardened Super-Junction Trench SOI LDMOS with Additional Hole Leakage Paths

, 2022
In this paper, a novel super-junction trench silicon-on-insulator laterally-diffused metal-oxide-semiconductor (SJT SOI LDMOS) power device with additional hole leakage paths to improve single-event burnout (SEB) performance under high liner energy ...
Zhuoxuan Zheng, Mengyao Cui, Lixin Wang, Yuanzhe Li, Yue Wang   +4 more
core   +1 more source

4H-SiC LDMOS Integrating a Trench MOS Channel Diode for Improved Reverse Recovery Performance. [PDF]

Micromachines (Basel), 2023
Liu Y, Jia D, Fang J.
europepmc   +1 more source

Table 1. Typical performance

, 2014
50 W LDMOS power transistor for base station applications at frequencies ...
Wimax Power Ldmos Transistor
core  

The effect of void on characteristics of LDMOS power amplifier

, 2016
Click on the DOI link to access the article (may not be free).The effect of void on characteristics of the laterally diffused metal oxide semiconductor (LDMOS) power amplifier (PA) is analyzed using the thermal and circuit analysis together.
Hyuncheol Park, Hyuck M. Kwon, Bae, Sooho, Son, Mi-Hyun, Kwon, Hyuck M., Sooho Bae, Park, Hyuncheol, Mi‐Hyun Son   +7 more
core   +1 more source

Mode of operation f VDS PL(AV) Gp ηD ACPR

, 2010
40 W LDMOS power transistor for base station applications at frequencies ...
Power Ldmos Transistor, Product Profile
core  

Improved LDMOS performance with buried multi-finger gates

, 2014
SOI LDMOS with buried multi-finger gates (BFG) is proposed and fabricated. The BFG acts as field plate, modulating the lateral electric field distribution in the drift region (off-state) and enhances the carrier accumulation at the surface of the drift ...
Liu, Linjie, Xia, Chao, Wang, Zhongjian, Xu, Dawei, Trellenkamp, Stefan, Cheng, Xinhong, Cao, Duo, Yu, Yuehui, Mantl, Siegfried, Zhao, Qing-Tai   +9 more
core   +1 more source

Gate Engineering in SOI LDMOS for Device Reliability

MATEC Web of Conferences, 2016
A linearly graded doping drift region with step gate structure, used for improvement of reduced surface field (RESURF) SOI LDMOS transistor performance has been simulated with 0.35µm technology in this paper.
Aanand, Sheu Gene, Imam Syed Sarwar, Lu Shao Wei, Aryadeep Chirag, Yang Shao Ming   +5 more
doaj   +1 more source

1.2 Features and benefits Excellent ruggedness

, 2013
100 W LDMOS power transistor for base station applications at frequencies ...
Power Ldmos Transistor, High Efficiency
core  

SPICE model of LDMOS structure

, 2019
V této bakalářské práci je provedeno porovnání struktury LDMOS oproti konvenční MOS struktuře. Anomální efekty, výzvy, které tato struktura přináší do oblasti modelování a charakterizace jsou popsány v první kapitole. Další část této práce se zaměřuje na
Loginov, Dmitrii
core   +1 more source

Substrate Current Enhances HCI Lifetime in STI-Based LDMOS

IEEE Journal of the Electron Devices Society
There is an increasing demand for LDMOS with low RON, high IDSAT, and longer HCI lifetime offered by standard CMOS technology. We achieved these demands without introducing additional processes or altering the LDMOS design. Increasing the dose and energy
Yoo Seon Song, Maik Liebau, Jun Wu, Keith Flynn, Armin Muehlhoff, Ruchil Jain, Siddabathula Mahesh, Tom Herrmann, Alban Zaka, Markus Lenski, Jan Hoentschel   +10 more
doaj   +1 more source