Results 11 to 20 of about 3,188,296 (245)

Impact of Fabrication Defects on FPGA Logic Using Memristor-Based Memory Cells [PDF]

open access: yesMicromachines
Memristor-based configuration memory offers an alternative solution to the volatility and large area overhead of conventional Static Random Access Memory (SRAM)-based FPGA configuration memory.
Jonas Schoenen   +10 more
doaj   +2 more sources

Design synthesis for dynamically reconfigurable logic systems [PDF]

open access: yes
Dynamic reconfiguration of logic circuits has been a research problem for over four decades. While applications using logic reconfiguration in practical scenarios have been demonstrated, the design of these systems has proved to be a difficult process ...
Vasilko, Milan
core   +9 more sources

Inductive synthesis of logic programs by composition of combinatory program schemes

open access: yes, 1999
Based on a variable-free combinatory form of definite clause logic programs we outline a methodology and supporting program environment COMBINDUCE for inducing well-moded logic programs from examples.
Nilsson, Jorgen Fischer.   +1 more
core   +9 more sources

On Ladder Diagrams Compilation and Synthesis to FPGA Implemented Reconfigurable Logic Controller

open access: yesAdvances in Electrical and Electronic Engineering, 2014
The paper presents synthesis process of a hardware implemented reconfigurable logic controller from a ladder diagram according to IEC61131-3 requirements. It is focused on the originally developed a high-performance LD processing method.
Adam Milik
doaj   +1 more source

The Synthesis Method of Logic Circuits Based on the NMOS-Like RRAM Gates

open access: yesIEEE Access, 2021
The synthesis method of logic circuits based on the RRAM (Resistive Random Access Memory) devices is of great concern in recent years. Inspired by the CMOS-like RRAM based logic gates, this work proposes a NMOS-like RRAM gate family.
Xiaole Cui, Ye Ma, Feng Wei, Xiaoxin Cui
doaj   +1 more source

Low power design and ASIC research of RS code

open access: yesJournal of Measurement Science and Instrumentation, 2023
In order to solve the low-power design of reed-solomon (RS) code, it is carried out from different design levels such as system architecture, RTL level and gate level, etc. And it is practiced in application specific integrated circuit (ASIC) design. The
ZHANG Pingping, LI Jinming
doaj  

A Heuristic-Driven and Cost Effective Majority/ Minority Logic Synthesis for Post-CMOS Emerging Technology

open access: yesIEEE Access, 2021
Due to the physical restriction of current CMOS technology, emerging technologies that have majority logic gate as a base component are being explored.
Vipul Kumar Mishra   +6 more
doaj   +1 more source

Dual Logic Area Optimization of Finite State Machine [PDF]

open access: yesJisuanji gongcheng, 2016
To cope with the problem that exists in the area optimization of Finite State Machine(FSM) by only using Traditional Boolean (TB) logic,a novel algorithm for FSM area optimization using both traditional Boolean logic and Reed-Muller (RM) logic,namely ...
LIN Weijian,WANG Lunyao,XIA Yinshui
doaj   +1 more source

Algorithms for extracting subsystems from a multilevel representation of a system of Boolean functions for joint minimization

open access: yesInformatika
Objectives. The purpose of experimental research is to determine the effectiveness of new algorithms for extracting the so-called connected subsystems from formula descriptions of the original system of Boolean functions.
P. N. Bibilo   +2 more
doaj   +1 more source

Fast and Reconfigurable Logic Synthesis in Memristor Crossbar Array

open access: yesAdvanced Intelligent Systems, 2022
Memristor is a potential basic unit for the in‐memory computing system, which is an approach to break the memory wall of the traditional computer. However, low switching speed, nonuniform device characteristics, and inefficient logic synthesis hinder the
Wei Wang   +11 more
doaj   +1 more source

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