Results 31 to 40 of about 4,810,089 (329)

Application of Graph Theory Algorithms in Non-disjoint Functional Decomposition of Specific Boolean Functions

Journal of Telecommunications and Information Technology, 2020
Functional decomposition is a technique that allows to minimize Boolean functions that cannot be optimally minimized using other methods, such as variable reduction and linear decomposition.
Tomasz Mazurkiewicz
doaj   +1 more source

Using Program Synthesis for Program Analysis [PDF]

, 2015
In this paper, we identify a fragment of second-order logic with restricted quantification that is expressive enough to capture numerous static analysis problems (e.g.
David, Cristina, Kroening, Daniel, Lewis, Matt   +2 more
core   +4 more sources

A Heuristic-Driven and Cost Effective Majority/ Minority Logic Synthesis for Post-CMOS Emerging Technology

IEEE Access, 2021
Due to the physical restriction of current CMOS technology, emerging technologies that have majority logic gate as a base component are being explored.
Vipul Kumar Mishra, Mayank Dixit, Tejalal Choudhary, Anurag Goswami, Manjit Kaur, Omar Cheikhrouhou, Habib Hamam   +6 more
doaj   +1 more source

LOT: Logic Optimization with Testability - new transformations for logic synthesis [PDF]

, 1998
A new approach to optimize multilevel logic circuits is introduced. Given a multilevel circuit, the synthesis method optimizes its area while simultaneously enhancing its random pattern testability.
Chatterjee, Mitrajit, Kunz, Wolfgang, Pradhan, Dhiraj K.   +2 more
core   +2 more sources

Walsh Spectral Techniques for Logic Synthesis FPGA

Advances in Electrical and Electronic Engineering, 2015
The implementation value of multi-output Boolean functions in logic synthesis FPGA can be reduced by using Walsh spectral representation. This paper proposes an algorithm for calculating the maximum coefficient of the autocorrelation function of BF ...
Nhan Khanh Huu Nguyen
doaj   +1 more source

Methods of Improving Time Efficiency of Decomposition Dedicated at FPGA Structures and Using BDD in the Process of Cyber-Physical Synthesis

IEEE Access, 2019
Physical systems may be carried out in both hardware and software. Hardware is based on implementing appropriate logic functions in FPGA structures connected with a physical layer of cyber-physical systems (CPSs).
Adam Opara, Marcin Kubica, Dariusz Kania
doaj   +1 more source

Secure Logic Synthesis

, 2004
This paper describes the synthesis of dynamic differential logic to increase the resistance of FPGAs against Differential Power Analysis. Compared with an existing technique, it saves more than a factor 2 in slice utilization. Experimental results indicate that a secure version of the AES algorithm can now be implemented with a mere doubling of the ...
Tiri, K., Verbauwhede, Ingrid
openaire   +2 more sources

Dual Logic Area Optimization of Finite State Machine [PDF]

Jisuanji gongcheng, 2016
To cope with the problem that exists in the area optimization of Finite State Machine(FSM) by only using Traditional Boolean (TB) logic,a novel algorithm for FSM area optimization using both traditional Boolean logic and Reed-Muller (RM) logic,namely ...
LIN Weijian,WANG Lunyao,XIA Yinshui
doaj   +1 more source

BLASYS: Approximate Logic Synthesis Using Boolean Matrix Factorization [PDF]

Design Automation Conference, 2018
Approximate computing is an emerging paradigm where design accuracy can be traded off for benefits in design metrics such as design area, power consumption or circuit complexity.
S. Hashemi, Hokchhay Tann, S. Reda
semanticscholar   +1 more source

Algorithms for extracting subsystems from a multilevel representation of a system of Boolean functions for joint minimization

Informatika
Objectives. The purpose of experimental research is to determine the effectiveness of new algorithms for extracting the so-called connected subsystems from formula descriptions of the original system of Boolean functions.
P. N. Bibilo, N. A. Kirienko, V. I. Romanov   +2 more
doaj   +1 more source