Results 91 to 100 of about 22,185 (127)
Coalgebraic logic and synthesis of Mealy machines
, 2008 We present a novel coalgebraic logic for deterministic Mealy machines that is sound, complete and expressive w.r.t. bisimulation. Every finite Mealy machine corresponds to a finite formula in the language.
Bonsangue, M.M. (Marcello) +2 more
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Plavis/FSM: an Environment to Integrate FSM-based Testing Tools
, 2008 . PLAVIS project aims at establishing the basis for a platform (an integrated set of tools) to support the VV&T activities, providing an environment that improves the validation and verification process applied to space software systems.
São Carlos +9 more
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Paso de ASM de tipo Mealy a una descripción Verilog fundamentalmente constituida por un proceso always que describe conjuntamente Control-Path y acciones del Data-pathhttps://polimedia.upv.es/visor/?id=0c03a740-19d1-11ef-a67e-f3eeebeecfaaGadea Gironés, R.
Gadea Gironés, Rafael
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Improving the Spatial Characteristics of Three-Level LUT-Based Mealy FSM Circuits
Electronics, 2023 The main purpose of the method proposed in this article is to reduce the number of look-up-table (LUT) elements in logic circuits of sequential devices. The devices are represented by models of Mealy finite state machines (FSMs). Thesee are so-called MPY FSMs based on two methods of structural decomposition (the replacement of inputs and encoding of ...
Larysa Titarenko +2 more
exaly +3 more sources
Improving the Characteristics of Multi-Level LUT-Based Mealy FSMs [PDF]
Electronics, 2020 Contemporary digital systems include many varying sequential blocks. In the article, we discuss a case when Mealy finite state machines (FSMs) describe the behavior of sequential blocks. In many cases, the performance is the most important characteristic of an FSM circuit.
Larysa Titarenko +2 more
exaly +3 more sources
Improving Characteristics of LUT-Based Mealy FSMs with Twofold State Assignment [PDF]
Electronics, 2021 Practically, any digital system includes sequential blocks. This article is devoted to a case when sequential blocks are represented by models of Mealy finite state machines (FSMs). The performance (maximum operating frequency) is one of the most important characteristics of an FSM circuit. In this article, a method is proposed which aims at increasing
Larysa Titarenko +2 more
exaly +3 more sources
Improving Characteristics of LUT-Based Three-Block Mealy FSMs’ Circuits
Electronics, 2022 One of the very important problems connected with FPGA-based design is reducing the hardware amount in implemented circuits. In this paper, we discuss the implementation of Mealy finite state machines (FSMs) by circuits consisting of look-up tables (LUT). A method is proposed to reduce the LUT count of three-block circuits of Mealy FSMs.
Larysa Titarenko +2 more
exaly +3 more sources
Reducing Hardware in LUT-Based Mealy FSMs with Encoded Collections of Outputs
Electronics, 2022 A method is proposed that is focused on reducing the chip area occupied by logic elements creating the circuit of Mealy finite state machines (FSMs). The proposed method is aimed at FSM circuits implemented with internal resources of field-programmable gate arrays (FPGA). The required chip area is estimated by the number of look-up table (LUT) elements
Larysa Titarenko +2 more
exaly +3 more sources