Results 111 to 120 of about 22,185 (127)

Optimizing a Mealy FSM Circuit in Mixed Element Basis

Cybernetics and Systems Analysis
zbMATH Open Web Interface contents unavailable due to conflicting licenses.
L A Titarenko, A A Barkalov
exaly   +2 more sources

Structural decomposition as a tool for the optimization of an FPGA-based implementation of a mealy FSM

Cybernetics and Systems Analysis, 2012
zbMATH Open Web Interface contents unavailable due to conflicting licenses.
L A Titarenko
exaly   +3 more sources

Twofold State Assignment for LUT-based Mealy FSMs

2018 25th International Conference "Mixed Design of Integrated Circuits and System" (MIXDES), 2018
A method is proposed for reducing hardware in LUT-based Mealy FSMs. The method is based on dividing the set of states by classes. Each state has two codes. This approach is used together with encoding of collections of outputs. An example of synthesis is given, as well as results of investigation.
Alexander Barkalov 0001, Larysa Titarenko, Kamil Mielcarek   +2 more
openaire   +1 more source

Twofold state assignment for FPGA-based mealy FSMs

2018 7th International Conference on Modern Circuits and Systems Technologies (MOCAST), 2018
A method is proposed for decreasing hardware in FPGA-based Mealy FSMs. The method is based on partitioning the set of states by classes. Each state is encoded as an element of the set of states and as an element of some class. An example of synthesis is given, as well as results of investigations.
Alexander Barkalov 0001, Larysa Titarenko, Kamil Mielcarek   +2 more
openaire   +2 more sources

A VHDL based Moore and Mealy FSM example for education

2017 IEEE 2nd International Conference on Signal and Image Processing (ICSIP), 2017
With recent technological advancements, modern societies are becoming more and more dependent on the automated machines. It is in order to cope with their fast-going lives. Modern automated machines adapt their sequence of actions depending on their environment and events. The FSM (Finite state machine) is used to mathematically express those sequences
Saeed Mian Qaisar
exaly   +2 more sources

Design of EMB-Based Mealy FSMs

2015
This chapter deals with design of Mealy FSMs based on using embedded memory blocks. The methods of trivial EMB-based implementation of logic circuits of Mealy FSMs are discussed. In this case, only one EMB is enough for implementing the circuit. Next, the optimization methods are discussed based on encoding of the collections of microoperations and ...
Alexander Barkalov, Larysa Titarenko, Malgorzata Kolopienczyk, Kamil Mielcarek, Grzegorz Bazydlo   +4 more
openaire   +1 more source

Designing FPGA-Based Mealy FSMs with Two Levels of Logic

2019 8th International Conference on Modern Circuits and Systems Technologies (MOCAST), 2019
A method is proposed for decreasing hardware in FPGA-based Mealy FSMs. The method is based on transforming state codes into class codes. The class codes are generated by the second level of FSM circuit An example of synthesis is given. The results of investigations are shown.
Larysa Titarenko, Kamil Mielcarek, Alexander Barkalov   +2 more
exaly   +3 more sources

Designing HFPGA-based Mealy FSMs with transformation of output functions

2017 MIXDES - 24th International Conference "Mixed Design of Integrated Circuits and Systems, 2017
A design method is proposed for HFPGA-based Mealy FSMs. The method is based on transformation of collections of output functions into state variables. It allows diminishing the number of LUTs in FSM circuits in comparison with known method. There is an example of design shown in the article.
Kamil Mielcarek, Alexander Barkalov 0001, Larysa Titarenko   +2 more
openaire   +2 more sources

Designing EMB-based Mealy FSM with transformation of collections of output functions

AIP Conference Proceedings, 2015
A design method is proposed for EMB-based Mealy FSM. The method is based on transformation of collections of output functions into state variables. Only two EMBs are necessary in the best case to implement the FSM logic circuit. The conditions of applying proposed method are given. An example of design is shown.
Wojciech Zając, Kamil Mielcarek, Alexander Barkalov   +2 more
exaly   +2 more sources

Designing LUT-based mealy FSM with transformation of collections of output functions

2016 5th International Conference on Modern Circuits and Systems Technologies (MOCAST), 2016
A design method is proposed for LUT-based Mealy FSMs. The method is based on transformation of collections of output functions into state variables. Example of design and results of investigations are given. The method allows obtaining FSM logic circuits with less amount of LUTs than known from literature methods.
Kamil Mielcarek, Alexander Barkalov
exaly   +2 more sources