Results 121 to 130 of about 28,940 (205)

Modeling of direct tunneling gate current and gate capacitance in deep submicron MOSFETs with high-K dielectric.

open access: yes, 2002
Scaling down of MOS device dimensions is accompanied by a decrease in gate-oxide thickness and an increase in substrate doping density. When gate oxide thickness becomes less than 2 nm, a substantial current follows through gate-oxide due to direct ...
Hakim, M. M. A.
core   +1 more source

Evaluation of testicular shielding effectiveness for surface and internal photon dose using a 3D‐printed scrotal phantom

open access: yesJournal of Applied Clinical Medical Physics, Volume 27, Issue 10, October 2026.
Abstract Background Testicular shielding has long been used to reduce testicular dose during radiation treatment. However, quantitative evaluations of the effectiveness of such shielding in the literature vary substantially. Purpose In this study, the dose reduction expected at both the testicular skin surface and the inside of the testes was evaluated
Joseph Speth   +8 more
wiley   +1 more source

Correlation of size specific dose estimates with organ dose in abdominal spectral computed tomography

open access: yesJournal of Applied Clinical Medical Physics, Volume 27, Issue 10, October 2026.
Abstract Background In abdominal spectral Computed Tomography (CT), organ dose assessment is important for radiation safety but remains challenging due to the complexity of Monte Carlo (MC) simulations. Purpose This study aimed to compare the correlations of three size‐specific dose estimate (SSDE) metrics (including the central slice SSDEcenter, the ...
Tian Qin   +6 more
wiley   +1 more source

Ampere-class double pulse testing of half-inch H-terminated diamond MOSFET chip

open access: yesApplied Physics Express
400 metal-oxide-semiconductor field-effect transistors (MOSFETs) were fabricated on a half-inch diamond substrate. The performance of each device was evaluated, and an H-terminated diamond MOSFET chip was created by connecting over 300 of the well ...
Keita Takaesu   +6 more
doaj   +1 more source

Toward Capacitive In‐Memory‐Computing: A Device to Systems Level Perspective on the Future of Artificial Intelligence Hardware

open access: yesAdvanced Intelligent Discovery, Volume 2, Issue 5, October 2026.
Capacitive, charge‐domain compute‐in‐memory (CIM) stores weights as capacitance,eliminating DC sneak paths and IR‐drop, yielding near‐zero standbypower. In this perspective, we present a device to systems level performance analysis of most promising architectures and predict apathway for upscaling capacitive CIM for sustainable edge computing ...
Kapil Bhardwaj   +2 more
wiley   +1 more source

Neural-network-based transfer learning for predicting cryo-CMOS characteristics from small datasets

open access: yesApplied Physics Express
Transfer learning was examined to predict current-voltage (I-V) characteristics of MOSFETs at cryogenic temperatures. An experimental dataset was obtained from approximately 800 silicon-on-insulator MOSFETs using an automated cryogenic wafer prober to ...
Takumi Inaba   +9 more
doaj   +1 more source

Textile Metamaterials: Design, Fabrication, and Emerging Applications

open access: yesApplied Research, Volume 5, Issue 5, October 2026.
Textile metamaterials combine sub‐wavelength electromagnetic structures with textile architectures, enabling flexible and wearable platforms for wave manipulation. This review highlights their evolution, fabrication strategies, electromagnetic characteristics, and emerging applications, while identifying key challenges and opportunities for next ...
Samanta M. de Holanda   +8 more
wiley   +1 more source

Subthreshold Time‐Mode All‐Digital DLL With Built‐In Linearization

open access: yesInternational Journal of Circuit Theory and Applications, Volume 54, Issue 10, Page 5045-5061, October 2026.
This paper presents a subthreshold time‐mode all‐digital delay‐locked loop (DLL) for low‐frequency clock generation. The large and tunable delay of the DLL is obtained using a static inverter delay line whose supply voltage is in the vicinity of 100 mV and adjustable by varying supply voltage. Phase error is processed by a time‐mode proportional block (
Fei Yuan, Wenhao Wu, Yushi Zhou
wiley   +1 more source

Modeling of Diamond Trench Metal Oxide Semiconductor Barrier Schottky Rectifier Based on Dynamic Reverse Bias Simulation Framework

open access: yesphysica status solidi (a), Volume 223, Issue 17, 9 September 2026.
Time‐resolved mixed‐mode technology computer aided design simulations reveal that the transient ionization response of deep boron acceptors fundamentally modifies the charge‐sharing mechanism in diamond TMBS rectifiers. Consequently, the optimum trench geometry under dynamic reverse‐bias conditions differs significantly from conventional quasi‐static ...
Martin Kah   +8 more
wiley   +1 more source

A study of electrical and material characteristics of high-k / III-V MOSFETs and SiO2 RRAMs [PDF]

open access: yes, 2013
textAggressive downscaling of complementary metal-oxide-semiconductor (CMOS) transistors has pushed Si-based transistors to their limit. III-V materials have much higher electron mobility compared to Si, which can potentially provide better device ...
Chen, Yen-Ting
core  

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