Results 31 to 40 of about 28,940 (205)
Electrically Active Defects in SiC Power MOSFETs
The performance and reliability of the state-of-the-art power 4H-SiC metal–oxide–semiconductor field-effect transistors (MOSFETs) are affected by electrically active defects at and near the interface between SiC and the gate dielectric.
Mayank Chaturvedi +3 more
doaj +1 more source
The physical realization of artificial neurons is a critical challenge for energy‐efficient neuromorphic computing. This review presents a comprehensive analysis of the evolution of artificial neuron implementations from conventional CMOS to emerging post‐CMOS technologies.
Kannan Udaya Mohanan +4 more
wiley +1 more source
Modeling the impact of the trench depth on the gate-drain capacitance in power MOSFETs [PDF]
Trench depth is important in low-voltage trench MOSFETs because it affects the switching losses through the gate-drain capacitance (C(GD)).
Ian Kennedy +11 more
core +1 more source
Performance characterization for long-time operation of cryogenic SiC MOSFETs remains as a challenge that requires further investigation. This paper presents experimental investigations into temperature and current dependent on-state resistance behaviors
Kang Hong +10 more
doaj +1 more source
The perspective presents an integrated view of neuromorphic technologies, from device physics to real‐time applicability, while highlighting the necessity of full‐stack co‐optimization. By outlining practical hardware‐level strategies to exploit device behavior and mitigate non‐idealities, it shows pathways for building efficient, scalable, and ...
Kapil Bhardwaj +8 more
wiley +1 more source
Boron-doped diamond MOSFETs operating at temperatures up to 400°C
The boron-doped diamond (B-diamond) metal-oxide–semiconductor field–effect transistors (MOSFETs) are fabricated and characterized at operating temperatures up to 400°C.
Jiangwei Liu +3 more
doaj +1 more source
High-temperature instability processes in SOI structures and MOSFETs
The paper reviews the problems related to BOX high-temperature instability in SOI structures and MOSFETs. The methods of bias-temperature research applied to SOI structures and SOI MOSFETs are analysed and the results of combined electrical studies of ...
Alexei N. Nazarov +3 more
doaj +1 more source
1/
The Low Frequency Noise (LFN) in MOSFETs is critical to Signal-to-Noise Ratio (SNR) demanding circuits. Buried Channel (BC) MOSFETs are commonly used as the source-follower transistors for CCDs and CMOS image sensors (CIS) for lower LFN.
Shi Shen, Jie Yuan
doaj +1 more source
Recent Advances in Plasma‐Enhanced Atomic Layer Etching for Next‐Generation Nanofabrication
Continued semiconductor miniaturization demands atomic‐scale patterning and ultralow surface roughness beyond the capabilities of conventional reactive ion etching. This review highlights advances in isotropic and anisotropic plasma‐enhanced atomic layer etching since 2020, covering fundamental mechanisms, applications across major semiconductor ...
Shih‐Nan Hsiao
wiley +1 more source
Improved analog performance in strained-Si MOSFETs using the thickness of the silicon-germanium strain-relaxed buffer as a design parameter [PDF]
The impact of self-heating in strained-Si MOSFETs on the switching characteristics of a complementary-metal-oxide-semiconductor (CMOS) inverter and the voltage gain of a push-pull inverting amplifier is assessed by technology-computer-aided-design (TCAD)
O'Neill, Anthony G. +3 more
core +1 more source

