Results 41 to 50 of about 51,359 (241)

High-temperature instability processes in SOI structures and MOSFETs

Journal of Telecommunications and Information Technology, 2001
The paper reviews the problems related to BOX high-temperature instability in SOI structures and MOSFETs. The methods of bias-temperature research applied to SOI structures and SOI MOSFETs are analysed and the results of combined electrical studies of ...
Alexei N. Nazarov, V. I. Kilchytska, Ja. N. Vovk, J. P. Colinge   +3 more
doaj   +1 more source

Design and simulation of a novel dual current mirror based CMOS‐MEMS integrated pressure sensor

IET Science, Measurement & Technology, 2021
This paper presents a novel dual current mirror based CMOS circuit for design and development of highly sensitive CMOS‐MEMS integrated pressure sensors. The proposed pressure sensing structure has been designed using piezoresistive effect in MOSFETs and ...
Shashi Kumar, Gaddiella Diengdoh Ropmay, Pradeep Kumar Rathore, Peesapati Rangababu, Jamil Akhtar   +4 more
doaj   +1 more source

Self-aligned silicidation of surround gate vertical MOSFETs for low cost RF applications

, 2010
We report for the first time a CMOS-compatible silicidation technology for surround-gate vertical MOSFETs. The technology uses a double spacer comprising a polysilicon spacer for the surround gate and a nitride spacer for silicidation and is successfully
A. Abuelgasim, A. Bousquet, C. H. de Groot, K. Mallik, L. Tan, M. M. A. Hakim, P. Ashburn, S. Connor, S. Hall, W. Redman-White   +9 more
core   +1 more source

Validity of the parabolic effective mass approximation in silicon and germanium n-MOSFETs with different crystal orientations [PDF]

, 2007
This paper investigates the validity of the parabolic effective mass approximation (EMA), which is almost universally used to describe the size and bias-induced quantization in n-MOSFETs.
Esseni, David, Hueting, Raymond J.E., Palestri, Pierpalo, Selmi, Luca, Steen, Jan-Laurens P.J. van der   +4 more
core   +3 more sources

Critical Role of Polymer Gate Dielectrics on the Charge Carrier Transport in Perovskite Field‐Effect Transistors

Advanced Functional Materials, EarlyView.
Charge transport in 2D tin perovskite FETs is shown to be governed by dielectric interface behavior. Polar polymer dielectrics induce dipolar disorder that localizes carriers, whereas nonpolar polymers suppress trapping and enable superior charge transport, ensuring stable and reliable transistor operation. ABSTRACT Understanding the role of interfaces
Chongyao Li, Zhitian Ling, Pawel Czulkin, Paul W. M. Blom, Wojciech Pisula, Tomasz Marszalek   +5 more
wiley   +1 more source

Thermal behavior and switching losses of MOSFET in high-frequency transformer circuits

Case Studies in Thermal Engineering
The rapid development of semiconductor technology has increased attention to heat generation in electronic components, particularly in Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs), which are key elements in modern power circuits.
Jiale Cheng, Yinghao Zhang, Xiangqun Cheng, Kaixin Guo, Yuchen Wang, Mian Jiang, Yabin Wang, Yang Liu   +7 more
doaj   +1 more source

1/ ${f}^{\gamma}$ Low Frequency Noise Model for Buried Channel MOSFET

IEEE Journal of the Electron Devices Society, 2020
The Low Frequency Noise (LFN) in MOSFETs is critical to Signal-to-Noise Ratio (SNR) demanding circuits. Buried Channel (BC) MOSFETs are commonly used as the source-follower transistors for CCDs and CMOS image sensors (CIS) for lower LFN.
Shi Shen, Jie Yuan
doaj   +1 more source

Activation mechanisms in sodium-doped Silicon MOSFETs

, 2007
We have studied the temperature dependence of the conductivity of a silicon MOSFET containing sodium ions in the oxide above 20 K. We find the impurity band resulting from the presence of charges at the silicon-oxide interface is split into a lower and ...
Barnes, C. H. W., Ferrus, T., George, R., Lumpkin, N., Paul, D. J., Pepper, M.   +5 more
core   +1 more source

Electrically detected magnetic resonance of carbon dangling bonds at the Si-face 4H-SiC/SiO$_2$ interface [PDF]

, 2017
SiC based metal-oxide-semiconductor field-effect transistors (MOSFETs) have gained a significant importance in power electronics applications. However, electrically active defects at the SiC/SiO$_2$ interface degrade the ideal behavior of the devices ...
D. Peters, G. Gruber, G. Pobegen, J. Cottom, M. Koch, P. Hadley, R. Meszaros, T. Aichinger, Weil J.   +8 more
core   +2 more sources

Dielectric and Gate Metal Engineering for Threshold Voltage Modulation in Enhancement Mode Monolayer MoS2 Field Effect Transistors

Advanced Materials, EarlyView.
Enhancement‐mode monolayer MoS2 FETs with low threshold voltage are essential for low‐power electronics. The threshold voltage can be tuned by the gate metal work function when the semiconductor/dielectric interface is clean. Interfaces between monolayer MoS2 and ZrO2 or hBN allow effective work‐function modulation of the threshold voltage, in contrast
Lixin Liu, Han Yan, Leyi Loh, Kamal Kumar Paul, Soumya Sarkar, Deepnarayan Biswas, Tien‐Lin Lee, Takashi Taniguchi, Kenji Watanabe, Manish Chhowalla, Yan Wang   +10 more
wiley   +1 more source