Results 21 to 30 of about 318,553 (304)
The logical encoding of Sugeno integrals [PDF]
, 2014 International audienceSugeno integrals are a well-known family of qualitative multiple criteria aggregation operators. The paper investigates how the behavior of these operators can be described in a prioritized propositional logic language, namely ...
Agnès Rico +24 more
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Polish Maritime Research, 2017 This paper presents the way of identifying the influence of the tolerance of model pumps (TYPE 3PWR-SE) construction on the total efficiency. The identification of sensitive control dimensions (Value/Tolerance) of examined pumps has been made by means of
Deptuła Adam +2 more
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An efficient ternary serial adder based on carbon nanotube FETs
Engineering Science and Technology, an International Journal, 2016 This paper presents an efficient ternary serial adder for nanotechnology employing negative, positive and standard ternary logics. Multiple-valued logic results in chips with more density, less complexity and high-bandwidth data transfer.
Mohammad Hossein Moaiyeri +2 more
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Analysis of minimization algorithms for multiple-valued programmable logic arrays [PDF]
, 1988 This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. As such, it is in the public domain, and under the provisions of Title 17, United States Code, Section 105, may not be copyrighted.Proceedings of ...
Butler, Jon T., Tirumalai, Parthasarathy
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A Systematic Method to Design Efficient Ternary High Performance CNTFET-Based Logic Cells
IEEE Access, 2020 The huge quantity of nodes and interconnections in modern binary circuits leads to extremely high levels of energy consumption. The interconnection complexity and other issues of binary circuits encourage researchers to consider multiple-valued logic ...
Arezoo Dabaghi Zarandi +2 more
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A heat quench algorithm for the minimization of multiple-valued programmable logic arrays [PDF]
, 1996 This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. As such, it is in the public domain, and under the provisions of Title 17, United States Code, Section 105, may not be copyrighted.Computer and ...
Butler, Jon T., Dueck, Gerhard W.
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Swarm intelligence versus direct cover algorithms in synthesis of Multi-Valued Logic functions [PDF]
Applied Computing and InformaticsAnt Colony Optimization and Particle Swarm Optimization represent two widely used Swarm Intelligence (SI) optimization techniques. Information processing using Multiple-Valued Logic (MVL) is carried out using more than two discrete logic levels.
Mostafa Abd-El-Barr +2 more
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Computation of Galois field expressions for quaternary logic functions on GPUs [PDF]
Serbian Journal of Electrical Engineering, 2014 Galois field (GF) expressions are polynomials used as representations of multiple-valued logic (MVL) functions. For this purpose, MVL functions are considered as functions defined over a finite (Galois) field of order p - GF(p).
Gajić Dušan B.
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Paracomplete logics which are dual to the paraconsistent logics L3A and L3B [PDF]
, 2020 In 2016 Beziau, introduce a more restricted concept of paraconsistency, namely the genuine paraconsistency. He calls genuine paraconsistent logic those logic rejecting φ, ¬φ |- ψ and |- ¬(φ ∧ ¬φ).
Borja-Macı́as, Verónica +2 more
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Multiple-valued logic operations with universal literals
Proceedings of 24th International Symposium on Multiple-Valued Logic (ISMVL'94), 1994 We propose the use of universal literals as a means of reducing the cost of multiple-valued circuits. A universal literal is any function on one variable. The target architecture is a sum-of-products structure, where sum is the truncated sum and product terms consist of the minimum of universal literals.
Dueck, Gerhard W., Butler, Jon T.
openaire +2 more sources