Results 71 to 80 of about 878 (167)

Leveraging the page buffer data cache for enhanced programmability in NAND flash memories with on‐chip microcontrollers

Electronics Letters
This paper proposes a simple yet effective scheme for NAND Flash memories that employ on‐chip microcontroller units (MCUs) to manage internal array operations.
Geonu Kim
doaj   +1 more source

On the Design and Implementation and Evaluation of Euclidean Geometry Quasi-Cyclic LDPC Codes for NAND Flash Memories

IEEE Open Journal of the Communications Society
As data storage demands continue to grow, ensuring the reliability of NAND flash devices after a large number of Program/Erase (P/E) cycles have elapsed has become a critical requirement.
G. Achala, U. Shripathi Acharya, Pathipati Srihari, Linga Reddy Cenkeramaddi   +3 more
doaj   +1 more source

Memcapacitor Crossbar Array with Charge Trap NAND Flash Structure for Neuromorphic Computing. [PDF]

Adv Sci (Weinh), 2023
Hwang S, Yu J, Song MS, Hwang H, Kim H.
europepmc   +1 more source

Estimation method for bit upset ratio of NAND flash memory induced by heavy ion irradiation

AIP Advances
In order to estimate the bit upset ratio of NAND flash memory induced by heavy ion irradiation, starting from the physical mechanism of the bit upset of NAND flash memory, an analytical model based on statistical methods was developed to describe the ...
Jiangkun Sheng, Mengtong Qiu, Peng Xu, Lili Ding, Yinhong Luo, Zhibin Yao, Fengqi Zhang, Shilong Gou, Zujun Wang, Yuanyuan Xue   +9 more
doaj   +1 more source

A Novel Program Scheme for Z-Interference Improvement in 3D NAND Flash Memory. [PDF]

Micromachines (Basel), 2023
Jia J, Jin L, Jia X, You K.
europepmc   +1 more source

Investigation of Erase Cycling Induced Joint Dummy Cell Disturbance in Dual-Deck 3D NAND Flash Memory. [PDF]

Micromachines (Basel), 2023
You K, Jin L, Jia J, Huo Z.
europepmc   +1 more source

Prediction of Random Telegraph Noise-Induced Threshold Voltage Shift and Its Scaling Dependency Using Machine Learning

IEEE Journal of the Electron Devices Society
Random telegraph noise (RTN) shifts the threshold voltage (Vt) of 3D NAND flash memory cells, making it a key factor of the device malfunction. The aim of this study is to predict the distribution of RTN induced ${\mathrm { V}}_{\mathrm { t}}$ shift in
Eunseok Oh, Hyungcheol Shin
doaj   +1 more source

Effects of Poly-Si Grain Boundary on Retention Characteristics under Cross-Temperature Conditions in 3-D NAND Flash Memory. [PDF]

Micromachines (Basel), 2023
An U, Yoon G, Go D, Park J, Kim D, Kim J, Lee JS.   +6 more
europepmc   +1 more source

Impact of Band-to-Band Tunneling in the Charge Trap Layer of NAND Flash Memory

IEEE Journal of the Electron Devices Society
This article investigates the impact of band-to-band tunneling (BTBT) occurring in the charge trap layer (CTL) of vertical NAND (V−NAND) flash memory under excessive erasure conditions and aggressive program operation. Strong local electric fields
Seongwoo Kim, Beomgeun Lee, Seungjae Baik, Myounggon Kang   +3 more
doaj   +1 more source

Investigation of Program Efficiency Overshoot in 3D Vertical Channel NAND Flash with Randomly Distributed Traps. [PDF]

Nanomaterials (Basel), 2023
Park C, Yoon JS, Nam K, Jang H, Park M, Baek RH.   +5 more
europepmc   +1 more source