Results 201 to 210 of about 29,727 (252)
Some of the next articles are maybe not open access.
Terminated Staircase Codes for NAND Flash Memories
IEEE Transactions on Communications, 2018In this paper, we propose novel terminated staircase codes for NAND flash memories. Specifically, we design a rate 0.89 staircase code whose component code is a Bose–Chaudhuri–Hocquenghem (BCH) code, for flash memories with page size of 16K bytes. Different from most conventional unterminated staircase codes, we propose a novel coding structure by ...
Min Qiu 0001 +3 more
openaire +1 more source
Evolution of NAND Flash Memory Interface
2007In this paper, we describe the basics of NAND flash memory and describe the evolution of its interface to facilitate easy integration, to provide high bandwidth, to offer disk-like interface, and/or to guarantee interoperability.
Sang Lyul Min +2 more
openaire +1 more source
Achieving Near-Zero Read Retry for 3D NAND Flash Memory
International Conference on Architectural Support for Programming Languages and Operating SystemsAs the flash-based storage devices age with program/erase (P/E) cycles, they require an increasing number of read retries for error correction, which in turn deteriorates their read performance.
Min Ye +7 more
semanticscholar +1 more source
Concatenated BCH codes for NAND flash memories
2012 IEEE International Conference on Communications (ICC), 2012In this work, we consider designing high-rate error-control systems for storage devices using MLC NAND flash memories. Traditional systems designed with either a single BCH code or multiple short BCH codes may suffer from high decoding complexity or rate loss due to limited error-correcting capability, respectively. Aiming at achieving a stronger error-
Sung-Gun Cho, Jeongseok Ha
openaire +1 more source
Modeling nand Flash Memories for IC Design
IEEE Electron Device Letters, 2008In this letter, we present a compact model of NAND flash memory strings for circuit simulation purposes. This model is modular and easy to be implemented, and its parameters can be extracted through a simple procedure. It allows accurate simulation of NAND flash memories with a limited computational effort, taking into account capacitive coupling ...
LARCHER, Luca +6 more
openaire +2 more sources
A hybrid SSD with PRAM and NAND Flash memory
Microprocessors and Microsystems, 2012The speed of computing processor has been improved dramatically with multi-core architecture. However, the overall computer system performance shows slow improvement because of the sluggish speed of storage system. Several researches have been done to improve the performance of storage system by introducing Solid-State Disk technology with NAND Flash ...
Gyu Sang Choi +3 more
openaire +1 more source
IEEE International Solid-State Circuits Conference, 2021
Continued improvement in the 3D NAND bit density is essential to satisfy the exponentially growing demand for data storage. The transition from 3b/cell (TLC) to 4b/cell (QLC) is a significant step towards delivering higher bit density.
A. Khakifirooz +18 more
semanticscholar +1 more source
Continued improvement in the 3D NAND bit density is essential to satisfy the exponentially growing demand for data storage. The transition from 3b/cell (TLC) to 4b/cell (QLC) is a significant step towards delivering higher bit density.
A. Khakifirooz +18 more
semanticscholar +1 more source
2018
Nowadays, Solid State Drives consume an enormous amount of NAND Flash memories [1] causing a restless pressure on increasing the number of stored bits per mm2. Planar memory cells have been scaled for decades by improving process technology, circuit design, programming algorithms [2], and lithography.
Rino Micheloni +2 more
openaire +1 more source
Nowadays, Solid State Drives consume an enormous amount of NAND Flash memories [1] causing a restless pressure on increasing the number of stored bits per mm2. Planar memory cells have been scaled for decades by improving process technology, circuit design, programming algorithms [2], and lithography.
Rino Micheloni +2 more
openaire +1 more source
2016 IEEE 8th International Memory Workshop (IMW), 2016
NAND Flash memory became a standard semiconductor nonvolatile memory. Everyone in the world has widely used NAND Flash memory in many applications, such as digital camera, USB drive, portable music player, smartphone, and tablet-PC. The cloud data server started to use SSD (Solid State Drive) which was based on NAND Flash memory.
openaire +1 more source
NAND Flash memory became a standard semiconductor nonvolatile memory. Everyone in the world has widely used NAND Flash memory in many applications, such as digital camera, USB drive, portable music player, smartphone, and tablet-PC. The cloud data server started to use SSD (Solid State Drive) which was based on NAND Flash memory.
openaire +1 more source
Flash Watermark: An Anticounterfeiting Technique for NAND Flash Memories
IEEE Transactions on Electron Devices, 2020This article demonstrates a novel technique for watermarking commercial off-the-shelf NAND flash memory chips. The technique uses repeated program-erase stressing to selectively control the physical properties of the flash cells and hence imprint watermark information into the flash media in an irreversible manner.
Sadman Sakib +2 more
openaire +1 more source

