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A review of NBTI mechanisms and models
Microelectronics Reliability, 2018Abstract A comprehensive review is done of different NBTI mechanisms and models proposed in the literature over the past years. The Reaction-Diffusion (RD) model based comprehensive framework and the alternative Energy Well (EW) models are discussed.
Souvik Mahapatra, Narendra Parihar
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The investigation on the fabrication and microstructure of NbTi-(NbTi)C Fe-based composite
Vacuum, 2019Abstract NbTi-(NbTi)C Fe-based composites are fabricated by in-situ diffusion reaction. The locally reinforced (NbTi)C cermet layer formed by carrying out the reaction of C + β-NbTi → (NbTi)C, which resulted in the formation of the core-annular shell structure with a ductile core (NbTi) and high hardness annular shell (cermet layer).
Jian-lei Zhu +4 more
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NBTI-Aware Clustered Power Gating
ACM Transactions on Design Automation of Electronic Systems, 2010The emergence of Negative Bias Temperature Instability (NBTI) as the most relevant source of reliability in sub-90nm technologies has led to a new facet of the traditional trade-off between power and reliability. NBTI effects in fact manifest themselves as an increase of the propagation delay of the devices over time, which adds up to the delay penalty
Andrea Calimera +2 more
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NBTI aging tolerance in pipeline based designs NBTI
2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 2013Aging mechanisms, like Negative Bias Temperature Instability (NBTI), are a great concern in CMOS nanometer technologies. In this work, we present pipeline oriented timing error tolerance techniques with a special interest in NBTI related performance degradation.
Katerina Katsarou +2 more
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20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07), 2007
Device scaling such as reduced oxide thickness and high electric field has given rise to various reliability concerns. One such growing issue of concern is the degradation of PMOS devices due to negative bias temperature instability (NBTI). NBTI has detrimental effects on the threshold voltage of the PMOS transistor thereby leading to lower performance
null Vijay Degalahal +9 more
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Device scaling such as reduced oxide thickness and high electric field has given rise to various reliability concerns. One such growing issue of concern is the degradation of PMOS devices due to negative bias temperature instability (NBTI). NBTI has detrimental effects on the threshold voltage of the PMOS transistor thereby leading to lower performance
null Vijay Degalahal +9 more
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NBTI mitigation in microprocessor designs
Proceedings of the great lakes symposium on VLSI, 2012Negative-Bias Temperature Instability seriously affects nanoscale circuits reliability and performance. Continuous stress and increasing operating temperatures lead to device degradation and long-term system unavailability. The opportunity to optimize the duty-cycle of the stress/recovery phases to reduce Vth degradation leads to innovative research of
CORBETTA, SIMONE, FORNACIARI, WILLIAM
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A precise-tracking NBTI-degradation monitor independent of NBTI recovery effect
2010 IEEE International Solid-State Circuits Conference - (ISSCC), 2010Scaling has accelerated transistor degradation with respect to aging, especially for Negative Bias Temperature Instability (NBTI), which can cause more than a 10% degradation in delay [1]. It is known that in NBTI conditions, delay degradation decreases quickly after the DC-stress has been removed.
Eisuke Saneyoshi +2 more
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On the efficacy of NBTI mitigation techniques
2011 Design, Automation & Test in Europe, 2011Negative Bias Temperature Instability (NBTI) has become an important reliability issue in modern semiconductor processes. Recent work has attempted to address NBTI-induced degradation at the architecture level. However, such work has relied on device-level analytical models that, we argue, are limited in their flexibility to model the impact of ...
Tuck-Boon Chan +3 more
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Impact of NBTI on analog components
2012 17TH IEEE EUROPEAN TEST SYMPOSIUM (ETS), 2012Negative bias temperature instability (NBTI) is one of the important reliability concerns that most drastically impacts circuit performances. In the digital domain, NBTI is addressed through adding reliability guard-bands on the maximum operating frequency of data paths and on the noise margins for memory cells. As a result, NBTI limits the performance/
Zhengliang Lv, Linda Milor, Shiyuan Yang
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On the temperature dependence of NBTI recovery
Microelectronics Reliability, 2008Poly resistors around the device can be used to perform fast in situ heating on a single device on wafer level. This is a commonly used technique to apply time-saving NBTI stress in the production line [Muth W, Walter W. Bias temperature instability assessment of n- and p-channel MOS transistors using a polysilicon resistive heated scribe lane test ...
Thomas Aichinger +2 more
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