Results 71 to 80 of about 5,324 (209)
A new oxide trap-assisted NBTI degradation model
Using detailed experimental data, we demonstrate that for the correct interpretation of negative bias temperature instability (NBTI) degradation behavior with stress time, it is essential to include the effect of trapping of hydrogen species in the oxide.
Rao, V. R., JHA, NK, RAO, VR, Jha, N. K.
core +1 more source
We developed a crystal InOx FET with a high field‐effect mobility exceeding 90 cm2/Vs, an on‐state current higher than that of an LTPS FET, and normally off characteristics on our 3.5th generation glass substrate line. By combining our unique OLED patterning technology, a high‐luminance, low‐power‐consumption 8K4K display was also successfully ...
Yukinori Shima +12 more
wiley +1 more source
Investigation and Improvement of the Bias Temperature Instability in Carbon Nanotube Transistors
In this work, the reliability of BTI in top‐gate CNT FETs under a wide range of temperatures is investigated firstly. The CNT devices not only exhibit a high on/off current ratio (Ion/Ioff, ≈105) and a low subthreshold swing (SS) ranging from 200 to 400 K, but also the threshold voltage (Vth) shifts caused by BTI become 2–3 times smaller than previous ...
Yifu Sun +9 more
wiley +1 more source
This study optimises heat treatment and aging to enhance the superconducting properties of in-situ alloyed Nb47Ti superconductors produced via laser powder bed fusion (LPBF).
Tugrul Talha Ersoz +5 more
doaj +1 more source
Impact of Aging, Self-Heating, and Parasitics Effects on NSFET and CFET
This work presents a comparative analysis of complementary field-effect transistor (CFET) and nanosheet FET (NSFET) architectures, with a focus on self-heating effects (SHEs), negative bias temperature instability (NBTI), hot carrier degradation (HCD ...
Swati Deshwal +4 more
doaj +1 more source
Implications of Burn-In Stress on NBTI Degradation
Burn-in is accepted as a way to evaluate ageing effects in an accelerated manner. It has been suggested that burn-in stress may have a significant effect on the Negative Bias Temperature Instability (NBTI) of subthreshold CMOS circuits. This paper analyses the effect of burn-in on NBTI in the context of a Digital to Analogue Converter (DAC) circuit ...
Mohd Azman Abdul Latif +3 more
openaire +3 more sources
Modeling of Static Negative Bias Temperature Stressing in p-channel VDMOSFETs using Least Square Method [PDF]
N. Mitrović +4 more
doaj +1 more source
Online Nbti Wear-out Estimation
CMOS feature size scaling has been a source of dramatic performance gains, but it has come at a cost of on-chip wear-out. Negative Bias Temperature Instability (NBTI) is one of the main on-chip wear-out problems which questions the reliability of a chip.
Dabhoiwala, Mehernosh H
core +1 more source
Future Circular Collider: The NbTi based Hadron Collider (FCC-NbTi)
This report describes a novel research infrastructure, based on a 100 km circumference circular tunnel and a hadron collider, using NbTi superconducting magnet technology, with centre-of-mass collision energy of 37.5 TeV, providing a total integrated ...
Benedikt, Michael
core
Particle swarm optimization based NBTI modeling for finFET circuits [PDF]
วารสารวิชาการและวิจัย มทร.พระนคร, 11 (1) : 78-91Fin Field Effect Transistor (FinFET) technology has increasingly been adopted for use within integrated circuits thanks to its superior electrical integrity and scalability.
Chookaew, Sasithorn +2 more
core

