Results 211 to 220 of about 23,788 (263)

Negative Bias Temperature Instability in CMOS Devices

Microelectronic Engineering, 2005
This paper reviews the experimental and modeling efforts to understand the mechanism of Negative Bias Temperature Instability (NBTI) in p-MOSFETs, which is becoming a serious reliability concern for analog and digital CMOS circuits. Conditions for interface and bulk trap generation and their dependence onstress voltage and oxide field, temperature and ...
MAHAPATRA, S, ALAM, AA, KUMAR, PB, DALEI, TR, VARGHESE, D, SAHA, D   +5 more
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An analytical model for negative bias temperature instability

2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, 2010
Negative bias temperature instability (NBTI) has become one of the major limiters for product lifetime, and various models have been proposed in order to explain NBTI. In this paper, an analytical model for DC NBTI and AC NBTI is proposed. This model describes the different time dependence of DC NBTI degradation at both short- and long-term stresses ...
Shengcheng Wang, Gang Du, Xiaoyan Liu
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Negative Bias Temperature Instability in Nanoscale Devices

2013
In this Chapter we focus on the NBTI of nanoscale SiGe pFETs and compare with the results obtained on large area devices. In particular, we assess the impact of individually trapped charges on the characteristics of SiGe devices with varying Si cap thicknesses, since this gate-stack parameter was found to be crucial for the standard NBTI reliability on
Jacopo Franco, Ben Kaczer, Guido Groeseneken   +2 more
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Negative bias temperature instability (NBTI) recovery with bake

Microelectronics Reliability, 2008
Abstract Negative bias temperature instability (NBTI) is a major degradation mechanism of PMOSFET devices. When the p-channel field effect transistor (PFET) gate is biased negatively with respect to the channel, as in a CMOS inverter, at an elevated temperature the threshold voltage (Vt) decreases (absolute value increases for application ...
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Towards Understanding Negative Bias Temperature Instability

2008 IEEE International Integrated Reliability Workshop Final Report, 2008
Modeling efforts of negative bias temperature instability date back to the work of Jeppson and Svensson in 1977, who proposed the basic form of the popular reaction-diffusion model. This model is still at the heart of many modeling attempts today. However, recent research indicates that even refined variants of this model, while getting some features ...
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TCAD Modeling of Negative Bias Temperature Instability

2006 International Conference on Simulation of Semiconductor Processes and Devices, 2006
At elevated temperatures, pMOS transistors show a considerable drift in fundamental device parameters such as the threshold voltage when a large negative bias is applied. This phenomenon, known as negative bias temperature instability, is regarded as one of the most important reliability concerns in highly scaled pMOS transistors. Modeling efforts date
T. Grasser, R. Entner, O. Triebl, H. Enichlmair, R. Minixhofer   +4 more
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Models of Source/Drain Bias on Negative Bias Temperature Instability

2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings, 2006
This paper discusses the influence of source/drain (S/D) bias on negative bias temperature instability (NBTI) in pMOS devices. It is found that with the S/D bias increase, the NBTI degradation is initially reduced, but it increases with higher S/D bias. Two models are presented to explain the underlying mechanisms.
Z.H. Gan, C.C. Liao, M.. Liao, J.P. Wang, W. Wong, B.G. Yan, J.F. Kang, Y.Y. Wong   +7 more
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Negative-bias-temperature-instability in metal–insulator–semiconductor structures

Materials Science and Engineering: B, 2004
We have demonstrated that negative-bias-temperature-instability (NBTI) significantly decreases the minority carrier generation lifetime as well as modifying the dominant source supplying minority carriers to the inversion layer at the semiconductor-insulator interface.
Volkos, S. N., Peaker, A. R., Hawkins, I. D., Efthimiou, E., Petkos, G.   +4 more
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Impact of negative bias temperature instability on product parametric drift

2004 International Conferce on Test, 2005
A systematic test methodology is presented that comprehends the impact of negative bias temperature instability on product parametric drift. In specific NBTI degradation mechanisms in digital CMOS circuits and transistors are presented. A test guard-banding technique to estimate parameter drift under BI and customer use conditions is also given.
Vijay Reddy, John M. Carulli, Anand T. Krishnan, William Bosch, Brendan Burgess   +4 more
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Critical Modeling Issues in Negative Bias Temperature Instability

ECS Transactions, 2009
Both the physical mechanisms as well as the modeling of negative bias temperature instability (NBTI) have attracted growing attention during the last years. While the reaction-diffusion theory had been the dominant explanation for a relatively long period, a growing number of authors have recently voiced their doubts regarding its validity. We give a
Tibor Grasser, Wolfgang Goes, Ben Kaczer
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