Results 71 to 80 of about 1,145 (180)

Adaptive Multiclient Network-on-Chip Memory Core: Hardware Architecture, Software Abstraction Layer, and Application Exploration

International Journal of Reconfigurable Computing, 2012
This paper presents the hardware architecture and the software abstraction layer of an adaptive multiclient Network-on-Chip (NoC) memory core. The memory core supports the flexibility of a heterogeneous FPGA-based runtime adaptive multiprocessor system ...
Diana Göhringer, Lukas Meder, Stephan Werner, Oliver Oey, Jürgen Becker, Michael Hübner   +5 more
doaj   +1 more source

On Asymptotic Analysis of Packet and Wormhole Switched Routing Algorithm for Application-Specific Networks-on-Chip

Journal of Electrical and Computer Engineering, 2012
The application of the multistage interconnection networks (MINs) in systems-on-chip (SoC) and networks-on-chip (NoC) is hottest since year 2002. Nevertheless, nobody used them practically for parallel communication. However, to overcome all the previous
Nitin
doaj   +1 more source

A novel simulated annealing based mapping for hybrid NoC-enabled DNN accelerators

Journal of King Saud University: Computer and Information Sciences
With the continuous development of very large-scale integration (VLSI), the number of cores integrated on a single chip has reached hundreds. Network-on-Chip (NoC), featuring a highly scalable and high-bandwidth communication architecture, has been ...
Chenglong Sun, Yihe Zhang, Yajun Liu, Yan Zhang, Qi Wang   +4 more
doaj   +1 more source

OSDTM: an Offline-Structural Distributed Test Mechanism for Data Links in NoC

International Journal of Information and Communication Technology Research, 2018
The Micro Packet Switched based Network on Chip (NoC) is emerged to address traditional non-scalable buses-based Systems on Chip (SoC) challenges such as out of order transactions, flow control and higher latencies.
Babak Aghaei, Ahmad Khademzadeh, Kambiz Badie, Midia Reshadi, Saeid Sarhangi   +4 more
doaj  

Routing Techniques in Network-On-Chip Based Multiprocessor-System-on-Chip for IOT: A Systematic Review

Iraqi Journal for Computer Science and Mathematics
Routing techniques (RTs) play a critical role in modern computing systems that use network-on-chip (NoC) communication infrastructure within multiprocessor system-on-chip (MPSoC) platforms.
yousif muhsen, Nor Azura Husin, Maslina Binti Zolkepli, Noridayu Manshor, Ahmed Abbas Jasim Al-Hchaimi, A. S. Albahri   +5 more
doaj   +1 more source

Hybrid Optimization Algorithm Based on Double Particle Swarm in 3D NoC Mapping. [PDF]

Micromachines (Basel), 2023
Fang J, Cai H, Lv X.
europepmc   +1 more source

Dynamically Scalable NoC Architecture for Implementing Run-Time Reconfigurable Applications. [PDF]

Micromachines (Basel), 2023
Ijaz Q, Kidane HL, Bourennane EB, Ochoa-Ruiz G.   +3 more
europepmc   +1 more source

Hotspots Reduction for GALS NoC Using a Low-Latency Multistage Packet Reordering Approach. [PDF]

Micromachines (Basel), 2023
Li Z, Shen R, Yi M, Song Y, Wang X, Du G, Huang Z.   +6 more
europepmc   +1 more source

SENECA: building a fully digital neuromorphic processor, design trade-offs and challenges. [PDF]

Front Neurosci, 2023
Tang G, Vadivel K, Xu Y, Bilgic R, Shidqi K, Detterer P, Traferro S, Konijnenburg M, Sifalakis M, van Schaik GJ, Yousefzadeh A.   +10 more
europepmc   +1 more source

Topology Reconfiguration for NoCs: A Fast Reconfiguration Algorithm Based on Monotonic Path Shifting. [PDF]

Micromachines (Basel)
Zhang M, Wang Z, Wang Z, Xu D, Niu N.
europepmc   +1 more source